Cypress AN46860 manual

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Table of contents for the manual

  • Page 1

    Schematic Review Checklist f or West Bridge ® Astoria ™ December 12, 2008 Document No. 001- 46860 Rev. * A 1 AN 46860 Author : Praveen Kumar Associated Project : No Software Version : Astoria SDK 1.0 Associated Application Notes : None Application Note Abstract West Bridge ® Astoria ™ is a USB and mass storage peripheral control device that c[...]

  • Page 2

    AN 46860 December 12, 2008 Document No. 001- 46860 Rev. * A 2 6. DACK# is used in conjunction with DRQ#. If INT# is used to indicate that at least one bit is set in the DRQ # register, then DACK# remains unused. DACK# is not required for Astoria to function. 7. INT#, DRQ#, and DACK# are in GVVDQ power domain. Therefore, pull up the input pin DACK# [...]

  • Page 3

    AN 46860 December 12, 2008 Document No. 001- 46860 Rev. * A 3 Clocks 1. Ensure that the XTALSLC[1:0] pin levels correspond to the frequency of the signal at XTALIN and XTALOUT. 2. Leave the XTALOUT floating if an external cl ock source is used. 3. Clock or crystal characteristics mu st conform to the requirements specified in the data sheet. 4. The[...]

  • Page 4

    AN 46860 December 12, 2008 Document No. 001- 46860 Rev. * A 4 Document History Document Title: Schematic Review Checklist for West Bridge ® Astoria™ Document Number: 001-46860 Revision ECN Submission Date Orig. of Change Description of Change ** 2516790 06/16/2008 PRKU New application note. *A 2620808 12/12/2008 OSG/A ESA Numbered the paragraphs[...]