GE IC697VAL348 manual

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  • Página 1

    GE Fanuc Automat ion Progr ammable Co ntrol Products IC697VAL348 8-Channel, 16-bit Digital -to-Ana log Converter Board User’ s Manual GF K - 205 9 51 4 - 0004 3 7 - 000 A Decemb er 2001[...]

  • Página 2

    GFL-002 Warnings, Cautions, and Notes as Used in this Publication Warni ng Warning noti ces are used i n this publi cation to em phasize that hazardou s volt ages, currents, temperatures, or other conditions that could cause personal injury exist in this equipment or may be associated with its use. In situations where inattention could cause either[...]

  • Página 3

    Conte nts GFK-20 59 iii Chapter 1 Introduction, Descr iption, and Spec ifications ......................................... 1-1 Reference Material an d Other GE Fanuc Manuals................................................... 1-1 General Description ................................................................................................. 1-[...]

  • Página 4

    GFK-2 059 1-1 Introdu ction, Descrip tion, and Specifica tions This m anual desc ribes ins tallation an d operation of th e IC697VAL348 8-C hannel, 16- Bit Di gital- to-Analog C onverter (DAC) Board. Reference Material and Other G E Fanuc Manuals For a detailed explanation of the VMEbus and its characteristics, “The VMEbus Specification” is ava[...]

  • Página 5

    1-2 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 1 General Description The primary features of the Digital-to-Analog Converter Board are as follows:  16-Bit reso lutio n  Buff ered voltag e outpu t (±10 V @ 5 mA)  Double-buffered d ata latches  Eight cha nnels ?[...]

  • Página 6

    GFK-2059 Chapter 1 I ntroducti on, Desc ription, a nd Spec ificatio ns 1-3 1 Functional Description The Digital-to- Analog Converter Board deli vers ± 10 V out puts with positive t rue offset bin ary inpu t coding or tw o 's compl ement codin g. The Digit al-to-An alog Conv erter Board feat ures dou ble- buffered data latches, buffered vo lta[...]

  • Página 7

    1-4 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 1 Safety Summary Warning The following general safety precautions must be observed during all phases of this operation, service, and repair of this product. Failure to comply with these precautions or with specific wa rnings e[...]

  • Página 8

    GFK-2 059 2-1 Configu ratio n and Insta llation This chapter co ntain s configur ation and installat io n instructio ns for the Digital-to -Analo g Converter Board , and is d ivid e d into the following sectio ns:  Physical Installatio n  Confi guratio n  Before A pply Power: Ch ecklist  Board Address Selection Switches  Address Modi[...]

  • Página 9

    2-2 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Physical Installa tion Caution Do not install or remo ve boards while pow er is applied. To install the bo a rd , de-energize the equip ment and insert the board into an appropr iate slot o f the chassis while ensu ring th a[...]

  • Página 10

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-3 2 Configuration This section of the manual describes the Digital-to-An alog Converter Board set-up procedure and jumper conf iguration. The board select base address an d board jum per configuration is factory preset and s hown in Table 2- 1 below. The bas e address sel ection sw itches (S [...]

  • Página 11

    2-4 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Before Applying Power: Checklist Before installing the bo ard in a VMEbus s ystem go throu gh the following chec klist to verify that the board is ready for the intended operation: 1. Have th e chapters on Theory and Program[...]

  • Página 12

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-5 2 Board Address Selection Switches There are two address select DIP switches on-board th e Digital-to-Analog Converter Board. Each individual s witch co rresp onds to an add ress bit, or is not use d. If the switch is ON the corresponding address bit is com pared to a logic "zero"[...]

  • Página 13

    2-6 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Figure 2-2: Jum per and Switch Locations on the Digital- to-Analog Converter Board JD JE S2 S1 JC DAC UPDATE MODE JU MPER EXTERNAL TRIGGER JUMPE R BOARD BASE ADDRESS SELECTION SWITCHES ADDRESS MODI FI ER JUMPER P1 P2 P3 JA J[...]

  • Página 14

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-7 2 Address Modifier Response Selection The DAC board is memory mapped in the sh ort I/O address space as described in Ch apter 3. The DAC board w ill respond to eit her of the two address modi fie r codes that may be issued to the DAC board by a CPU board durin g a Write or Read cy cle. The [...]

  • Página 15

    2-8 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Digital Code S election The DAC board i s factory configu red for off set binary coding. To chang e the DAC in put coding to two’ s complement binary, remove jumper JA and install jumper JB (see Figure 2-3 below ). Figure [...]

  • Página 16

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-9 2 Program Controlled and External Start Convert Mode The PROGRAM CONT RO LLED START CONVERT MODE is enabled by inserting jumper JD. This mode is detailed in “Program C ontrol Update Mode” on page 4- 4 and “Del ayed DAC Update Mode” on page 3- 6. With no jum per installed at JD, the [...]

  • Página 17

    2-10 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Connector Descriptions Two 96-pin DIN type connectors, P1 and P2, con nect the DAC board to th e VMEbus backplan e. The primary connector, P1 , contains the addr ess d ata and control line s and all additional si gnal s nec[...]

  • Página 18

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-11 2 Figure 2- 4: P2 Con nector – Pi n A ssignm ents PIN 1 PIN 2 PIN 3 PIN 4 PIN 5 PIN 6 PIN 7 PIN 8 PIN 9 PIN 10 PIN 11 PIN 12 PIN 13 PIN 14 PIN 15 PIN 16 PIN 17 PIN 18 PIN 19 PIN 20 PIN 21 PIN 22 PIN 23 PIN 24 PIN 25 PIN 26 PIN 27 PIN 28 PIN 29 PIN 30 PIN 31 PIN 32 C B A ROW REAR VIEW OF [...]

  • Página 19

    2-12 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Table 2-2: P2 Connector Pin Number Row A Signal Mnemon ic Row B Signal Mnemon ic Row C Signal Mnemon ic 1 ANA COM +5V 2 ANA COM GND 3 ANA CO M 4 ANA CO M 5 ANA CO M 6 ANA CO M 7 AINTEST BS 8 ANA CO M 9 10 ANA CO M 11 12 ANA[...]

  • Página 20

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-13 2 Figure 2- 5: P3 Con nector – Pi n A ssignm ents PIN 16 PIN 15 A C* ROW FRONT VIEW OF "P3 " CONNECTOR PIN 14 PIN 13 PIN 12 PIN 11 PIN 10 PIN 9 PIN 8 PIN 7 PIN 6 PIN 5 PIN 4 PIN 3 PIN 2 PIN 1 "PC Board" *Row C pins are all analog common[...]

  • Página 21

    2-14 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Table 2-3: P3 Connector Pin Number Row A Signal Mnemon ic Row B Signal Mnemon ic Row C Signal Mnemon ic 1 ANA COM ANA COM 2 AN00 ANA COM 3 AN01 ANA COM 4 AN02 ANA COM 5 AN03 ANA COM 6 AN04 ANA COM 7 AN05 ANA COM 8 AN06 9 AN[...]

  • Página 22

    GFK-20 59 Chapter 2 C onfig uration and I nstalla tion 2-15 2 DAC Zero Offset and Gain Calib ration Note This procedure assumes that the offset binary coding jum per (JA) is selected. 1. Re move p ower fro m the Di gita l-to -Analo g Co nverte r Boa r d. 2. Remove any cable con nected to the P3 connector. 3. Re move the D igital-to-Analo g Converte[...]

  • Página 23

    2-16 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-2059 – December 2 0 01 2 Figure 2-6: Calibration Adjust men t Locatio ns P1 P2 P3 COMPONENT SIDE R1 R9 R17 R25 R5 R13 R21 R29 R3 R11 R19 R27 R7 R15 R23 R31 1 16[...]

  • Página 24

    GFK-2 059 3-1 Programming This cha p ter co ntains pr ogra mming i ns tructio ns for the Digit al-to- A nalog Co nvert e r Boa rd, and is divided into the follo wing sect io ns:  Introduction to Pr ogramming the Digital-to-Analo g Converter B o ard  Digital-to-Analog Converter Board Progra mm ing Optio n s  Delayed DA C Update Mode  Tes[...]

  • Página 25

    3-2 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Introduction to Programming the Digital-to- Analog Converter Board The Digital-to-Analog Converter Board is memory mapped in the short I/O address space. The board occupies 16 su ccessive word locations in the VME short I/O [...]

  • Página 26

    GFK-20 59 Chapter 3 Progr amming 3-3 3 Digital-to-Analog Converter Boa rd Programming Options There are two types of registers that must b e written to for prop er operation of the DAC bo ard. One is the CSR, and the other is the DAC. T he order in which t hey are written to may differ dep ending on the method used to start a con version. Immediate[...]

  • Página 27

    3-4 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Exampl e: The analog out put for a digit al inpu t of 0A00H would be: 1. 0A00H decim al equ ivalent i s 2560 2. Analog out = - 10 V + ( (2560) __2 0__ ) 65, 536 = -9.2187 5 Table 3-4. Control Register Data Format and D efini[...]

  • Página 28

    GFK-20 59 Chapter 3 Progr amming 3-5 3 Table 3-5: Progr amming the Contr ol and Status Register for Differ ent Analog Output V ariations – Bit Definitions Analog Output Over TEST BUS 1 (A INTESTBS) D15 D14 D13 D12 D11 D10 D09 D08 Not Used 1 0 1 1 Not Used 0 or 1 0 Analog Output Over TEST BUS 2 (A INTESTBS) D15 D14 D13 D12 D11 D10 D09 D08 Not Used[...]

  • Página 29

    3-6 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Delayed DAC U pdate Mode The DELAYED DAC UPDAT E MODE operation i s described in “Del ayed DAC Update Mode” on page 4- 4. This m ode must have prev iously been enabled by the jum per conf igurat ion in “Program C ontro[...]

  • Página 30

    GFK-20 59 Chapter 3 Progr amming 3-7 3 Test Mode Programming Any of th e eight DAC ou tputs may be select ed to pass to an ADC board over test bus 2 to v erify the DAC outputs. If a MUX is present in the an alog backplane then any DAC output can be selected to g o to that board f or tes t purposes over test bus 1. Generally the programm ing sequen [...]

  • Página 31

    3-8 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Program Example (Delayed DAC Update Mod e) In the prog ramming ex ample in “ Test Mode Programm ing” on pag e 3-7, all ei ght DAC conv erters were loaded w ith a full scale value of FFFH in the IMMEDIATE UPDATE MODE. For[...]

  • Página 32

    GFK-20 59 Chapter 3 Progr amming 3-9 3 Figure 3- 1: DAC Prog ramming Se quence (Immediat e DADC Start C onvert Mode) POWER - UP (ON - BOARD INITIALIZATION ) LOAD D/A CONTROL REGISTER INITIALIZE D/A ADDRESS POINTER L O AD D/A HAVE ALL 8 D/A CHANNEL BEEN UPDATED ? END YES NO[...]

  • Página 33

    3-10 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Table 3-6: An alog Output Contro l in Immediat e DAC Update Mode Analog Out Path way Control Word (D15 t o D0) Hex Val ue P3 Conne ctor 4100 AOT ESTBS (TEST BUS 2) 6C00 AINT ESTBS (T EST BU S 1) 5C00 AOT ESTBS and P3 Conne [...]

  • Página 34

    GFK-20 59 Chapter 3 Progr ammi ng 3-11 3 Figure 3- 2: DAC Prog ramming Se quence (Delayed DAC Update Mode) POWER-UP (O N- BOARD INITIALIZATION) INITIALIZE D/A ADDRESS POINTER L O AD D/A HAVE ALL 8 D/A CHANNEL BEEN UPDATED ? END YES NO LOAD D/A CONTROL REGISTER[...]

  • Página 35

    3-12 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 3 Table 3-7: Analog Output Control in Delayed DAC Update Mode Analog Out Path way Control Word (D15 t o D0) Hex Val ue P3 Conne ctor 4300 AOTESTBS (T EST BUS 2) 6E00 AINTESTBS (T EST BUS 1) 5E00 AOT ESTBS and P3 Conne ctor 6F[...]

  • Página 36

    GFK-2 059 4-1 Theory o f Opera tion This chapter d iscus ses the operatio n of the Digital-to -Analo g Converter B o ard, and is divid e d into the followin g sectio ns:  Operational Overvie w  Imme diate DAC Update Mode  Delayed DAC Update Mode  VMEbus Interface Description 4 Chapter[...]

  • Página 37

    4-2 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 4 Operational Overview The Digital-to-Analo g Converter B oard performs digital-to-analog con versio n on 16-bit positive true off set bin ary or two’s complement coded w ords, with an analog out put range of - 10 to +10 V. [...]

  • Página 38

    GFK-20 59 Chapter 4 Theory of Opera tion 4-3 4 Immediate DAC Update Mode The processor unit sends the 16-bit w ord to be converted to the f irst register of the selected DAC. If that DAC cha nnel has pr eviously been ju mp ered to, it will automaticall y pass the conte nts of the first DAC register into the second register and u pdate the analog ou[...]

  • Página 39

    4-4 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 4 Delayed DAC U pdate Mode In the DELAYED DAC UP DATE MODE, the pro cessor sends the 16-bit word to be converted to the first DAC register of the selected DAC. The data is stored there and tran sferred to the second DAC regist[...]

  • Página 40

    GFK-20 59 Chapter 4 Theory of Opera tion 4-5 4 Figure 4-1: Digital-to-Analo g Converter Bo ard Functional Block Diagra m PROGRAM CONTROL UPDATE 16-BIT DAC NO. 1 DAC SEL 16-BIT DAC NO. 2 DAC SEL 16-BIT DAC NO. 3 DAC SEL 16-BIT DAC NO. 4 DAC SEL CH 1 CH 2 CH 3 CH 4 OPERATION AND CONTROL LOGIC 16-BIT DAC NO. 5 DAC SEL 16-BIT DAC NO. 6 16-BIT DAC NO. 7[...]

  • Página 41

    4-6 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 4 VMEbus Interface Descrip tion The VMEbus interface (Figu re 4-4 on page 4- 9) contains the necessary log ic to interface a DAC board to the VMEbu s. The DAC is memory mapped in the VMEbus short I/O address space. During a Wr[...]

  • Página 42

    GFK-20 59 Chapter 4 Theory of Opera tion 4-7 4 Figure 4-2: Test Bus Log ic ADDRESS REGIST ER A01 A02 A03 A04 1 TEST REGISTER CLOCK D/A CHA NNEL SELE CT 3 TE ST MUX DA OUTPUTS 1 TO 8 1 MUX OUT ANALOG TEST SWITCH TEST BU S 1 TEST BU S 2 GND SEN P2 3 TEST CONTROL[...]

  • Página 43

    4-8 IC697VAL 348 8-C hannel, 16-bi t D igital-to-A nalo g Conve rter Boa rd Use r’ s Man ual GFK-20 59 – December 20 01 4 Figure 4-3: VMEbu s Interface Logic and In terface Signals VMEbus CONNECTION (P1) BOARD ADDRESS AND ADDRESS MODIFIER COMPARATOR 21 A15 to A05 AM5 to AM0 A4 to A01 BOARD SELECT 1 DATA TRANSCEIVER 16 D15 to D0 16 TO D/As 4 7 D[...]

  • Página 44

    GFK-20 59 Chapter 4 Theory of Opera tion 4-9 4 Figure 4- 4: Digi tal-t o-Analog C onverter Board Pow er P1 +5 V GND DIG GND +5 V DC-TO-DC CONVERTER +5 V GND ANA CO -15 V -15 V ANA COM DC-TO-DC CONVERTER +5 V GND ANA CO +15 V +15 V P2 +5 V GND[...]

  • Página 45

    GFK-2 059 5-1 Mainten ance This chapter pr o vides information relative to t he care and maintenance o f the Digital-to -Analo g Convert er Board. If th e product m alfun ctions, verify the foll owing: • Software • Syst e m confi gura tion • Electrical connections • Jumper or co nfiguratio n optio ns • Boards fully inserted into their pro[...]