English dropdown-ico

Xilinx UG144 manual

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138

Go to page of

Similar user manuals

A good user manual

The rules should oblige the seller to give the purchaser an operating instrucion of Xilinx UG144, along with an item. The lack of an instruction or false information given to customer shall constitute grounds to apply for a complaint because of nonconformity of goods with the contract. In accordance with the law, a customer can receive an instruction in non-paper form; lately graphic and electronic forms of the manuals, as well as instructional videos have been majorly used. A necessary precondition for this is the unmistakable, legible character of an instruction.

What is an instruction?

The term originates from the Latin word „instructio”, which means organizing. Therefore, in an instruction of Xilinx UG144 one could find a process description. An instruction's purpose is to teach, to ease the start-up and an item's use or performance of certain activities. An instruction is a compilation of information about an item/a service, it is a clue.

Unfortunately, only a few customers devote their time to read an instruction of Xilinx UG144. A good user manual introduces us to a number of additional functionalities of the purchased item, and also helps us to avoid the formation of most of the defects.

What should a perfect user manual contain?

First and foremost, an user manual of Xilinx UG144 should contain:
- informations concerning technical data of Xilinx UG144
- name of the manufacturer and a year of construction of the Xilinx UG144 item
- rules of operation, control and maintenance of the Xilinx UG144 item
- safety signs and mark certificates which confirm compatibility with appropriate standards

Why don't we read the manuals?

Usually it results from the lack of time and certainty about functionalities of purchased items. Unfortunately, networking and start-up of Xilinx UG144 alone are not enough. An instruction contains a number of clues concerning respective functionalities, safety rules, maintenance methods (what means should be used), eventual defects of Xilinx UG144, and methods of problem resolution. Eventually, when one still can't find the answer to his problems, he will be directed to the Xilinx service. Lately animated manuals and instructional videos are quite popular among customers. These kinds of user manuals are effective; they assure that a customer will familiarize himself with the whole material, and won't skip complicated, technical information of Xilinx UG144.

Why one should read the manuals?

It is mostly in the manuals where we will find the details concerning construction and possibility of the Xilinx UG144 item, and its use of respective accessory, as well as information concerning all the functions and facilities.

After a successful purchase of an item one should find a moment and get to know with every part of an instruction. Currently the manuals are carefully prearranged and translated, so they could be fully understood by its users. The manuals will serve as an informational aid.

Table of contents for the manual

  • Page 1

    R -- DISCONTINUED PROD UCT -- LogiCORE™ IP 1-Gigabit Ethernet MA C v8.5 User Guide UG144 April 24, 2009[...]

  • Page 2

    www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 -- DISCONTINUED P RODUCT -- Xilinx is providing this product documentation, hereinafter “Inf or mation, ” to y ou “AS IS” with no warranty of any kind, e xpress or implied. Xilinx makes no represen tation that the Inf or mation, or any par t icular implementation[...]

  • Page 3

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com UG144 Apr il 24, 2009 -- DISCONTINUED PRODUCT -- Revision History The following table shows the revision history for this document. Date V ersion Revision 09/30/04 1.0 Initial Xilinx release. 04/28/05 2.0 Updated to 1-Gigabit Ethernet MAC version 6.0, Xilinx tools v7.1i SP1. 01/18/06 3.0 Updat[...]

  • Page 4

    www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 -- DISCONTINUED P RODUCT --[...]

  • Page 5

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com UG144 Apr il 24, 2009 -- DISCONTINUED PRODUCT -- Schedule of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Schedule of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 6

    w ww .xilin x.com 1-Gigabit Ethernet MA C v8.5 User Guide UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 4: Designing with the Core General Design Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Design Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 7

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT - - Connecting the MDIO to an Inte rnally Integrated PHY . . . . . . . . . . . . . . . . . . . . . . . . 76 Connecting the MDIO to an External PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Chapter 8: Configuration a[...]

  • Page 8

    w ww .xilin x.com 1-Gigabit Ethernet MA C v8.5 User Guide UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 12: Implementing Your Design Pre-implementation Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Using the Simulation Model . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 9

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 9 UG144 Apr il 24, 2009 -- DISCONTINUED PRODUCT -- Chapter 1: Introducti on Chapter 2: Core Architecture Figure 2-1: Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 2-2: Component P inout for MAC wi th Optional M[...]

  • Page 10

    10 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 R -- DISCONTIN UED PRODUC T -- Chapter 7: Using the Ph ysical Side Interface Figure 7-1: External GMII Transmitter Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 7-2: External GMII Receiver Logic for Spartan -3, Spartan-3E, a[...]

  • Page 11

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 11 UG144 Apr il 24, 2009 R -- DISCONTIN UED PRODUC T -- Chapter 11: Interfaci ng to Other Cores Figure 11-1: 1-Gigabit Ethernet MA C Extended to Include 1000BASE-X PCS with TBI 114 Figure 11-2: 1-Gigabit Ethernet MA C Extended to Include 1000BASE-X PCS and PMA using a RocketIO Transceiver . . [...]

  • Page 12

    12 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 R -- DISCONTIN UED PRODUC T --[...]

  • Page 13

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 13 UG144 Apr il 24, 2009 -- DISCONTINUED PRODUCT -- Chapter 1: Introducti on Chapter 2: Core Architecture Table 2-1: Transmitter Client Inte rface Signal Pi ns . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 2-2: Receive Client Interface Signal Pins . . . . . . . . . .[...]

  • Page 14

    14 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 R -- DISCONTIN UED PRODUC T -- Table 8-8: Unicast Address Word 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82 Table 8-9: Unicast Address Word 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . [...]

  • Page 15

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 15 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Pr eface About This Guide The LogiCORE™ IP 1-Gigabit Ethernet MAC User Guide pr ovides information about generating the core, customizing and simulating the core utilizing the pr ovided example design, and r unning the design files thr ou[...]

  • Page 16

    16 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Preface: About This Guide R -- DISCONTINUED PROD UCT -- Con ventions This document uses the following convention s. An example illustrates each convention. T ypographical The following typographical conventions are used in this document: Con vention Meaning or Use Exa[...]

  • Page 17

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 17 UG144 Apr il 24, 2009 Con ventions R -- DISCONTINUED PRODUCT -- Online Document The following li nking conventi ons ar e used in this document: List of Acronyms The following table describes acr onyms used in this manual. Con vention Meaning or Use Example Blue text Cro s s- ref ere nc e li[...]

  • Page 18

    18 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Preface: About This Guide R -- DISCONTINUED PROD UCT -- NCD N ative Circuit Descri ption NGC Native Generic Circuit NGD Native Generic Database ns nanoseconds PCB Printed Cir cuit Boar d PCS Physical Coding Sublayer PHY physical-side interfac e PMA Physical Medium Att[...]

  • Page 19

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 19 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 1 Intr oduction The 1-Gigabit Ethernet MAC (G EMAC) core is a fully verified solution that supports V erilog-HDL and VHDL . In addition, the exam ple design provided with the cor e is provided in bo th V erilog and VHDL. This chapte[...]

  • Page 20

    20 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 1: Introd uction R -- DISCONTINUED PRODUCT -- Specifications • IEEE 802.3 2005 • Reduced Gigabit Media Indepen dent Interface (RGMII) version 2. 0 T echnical Suppor t For technical support, see s upport.xilinx.com/ . Questions ar e routed to a team of engi[...]

  • Page 21

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 21 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 2 Cor e Ar chitectur e This chapter describes the GEMAC core ar chitec ture, including the major functional block s and all interfaces. System Overview Figur e 2-1 illustrates a block diagram of the GEMA C core with all the major fu[...]

  • Page 22

    22 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 2: Core Arc hitecture R -- DISCONTINUED PRODUCT -- Core Components T ransmit Engine The T ransmit Engine accepts Ethernet frame da ta from t he Client T ransmitter Interface, adds the preamble field to the start of the fram e, adds padding bytes (i f requir ed[...]

  • Page 23

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 23 UG144 Apr il 24, 2009 Core Interfaces R -- DISCONTINUED PRODUCT - - Core Interfaces GMA C Core with Optio nal Management Interf ace Figur e 2-2 shows the pinout for the GEMAC cor e using the optional Management Interface. The interface is unch anged, regardless of whether the optional Addre[...]

  • Page 24

    24 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 2: Core Arc hitecture R -- DISCONTINUED PRODUCT -- GMA C Core Without Management In terf ace and With Address Filter Figur e 2-3 shows the pinout for the GEMAC core when the optional Management Interface is omitted and the optional Addr ess Filter is included [...]

  • Page 25

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 25 UG144 Apr il 24, 2009 Core Interfaces R -- DISCONTINUED PRODUCT - - GEMA C Core Without Management Inte rf ace and Withou t Address Filter Figur e 2-4 shows the pinout for the GEMAC core when the optional Management Interface is omitted and the optional Address Filter is omitted. The config[...]

  • Page 26

    26 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 2: Core Arc hitecture R -- DISCONTINUED PRODUCT -- All ports of the core ar e internal connection s in FPGA fabric. An HDL example design is deliver ed with the core that will add IBUFs, OBUFs, and IOB fli p-flops to the exte rnal signals of the Gigabit Media [...]

  • Page 27

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 27 UG144 Apr il 24, 2009 Core Interfaces R -- DISCONTINUED PRODUCT - - Receiv er Interface Ta b l e 2 - 2 describes the client-side r eceiver signals of the GEMAC cor e. These signals ar e used by to transfer data to the client. See “Receiving Inbound Frames,” on page 39 . Flow Control Int[...]

  • Page 28

    28 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 2: Core Arc hitecture R -- DISCONTINUED PRODUCT -- Management Interf ace (Optional) Ta b l e 2 - 4 describes the optional signals used by the client to access the ma nagement features of the GEMAC cor e. See “Using the Optional Management Interface,” on pa[...]

  • Page 29

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 29 UG144 Apr il 24, 2009 Core Interfaces R -- DISCONTINUED PRODUCT - - Configuration V ector (Optional) Ta b l e 2 - 6 describes the alternative to the optional Management Interface signals. The Configuration V ector uses direct inputs to the core to r eplace the functionality of the MAC confi[...]

  • Page 30

    30 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 2: Core Arc hitecture R -- DISCONTINUED PRODUCT -- MDIO Interf ace Ta b l e 2 - 9 describes the MDIO Interface signals . See “Using the MDIO interface,” on page 76 . T able 2-9: MDIO Interface Signal Pinout Signal Direction Cloc k Domain Description mdc Ou[...]

  • Page 31

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 31 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 3 Generating the Cor e The GEMAC core is generated through the Xilinx CORE Generator™ using a graphical user interface (GUI). This chapter descri bes the GUI options used to generate and customize the core. Graphical User Interfac[...]

  • Page 32

    32 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 3: Generating the Core R -- DISCONTINUED PRODUCT -- Component Name The component name is used as the bas e name of the output files generated for the cor e. Names must begin with a letter and must be composed fr om the following characters: a through z, 0 thr [...]

  • Page 33

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 33 UG144 Apr il 24, 2009 Output Generation R -- DISCONTINUED PRODUCT - - Output Generation The output files generated fr om the CORE Generator tool are placed in the CORE Generator pr oject directory . The list of output files includes the following items. • Netlist file for the core • Sup[...]

  • Page 34

    34 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 3: Generating the Core R -- DISCONTINUED PRODUCT --[...]

  • Page 35

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 35 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 4 Designing with the Cor e This chapter provides general guidelines for creating designs using the GEMAC core. T o work with the example design included with the GEMAC core, see the 1-Gigabit Ethernet MAC Getting Started Guide . Gen[...]

  • Page 36

    36 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 4: Designing with the Core R -- DISCONTINUED PRODUCT -- Using the example design as a starting point, you can do the followi ng: • Edit the HDL top level of the example design file to: ♦ Change the clocking scheme. ♦ Add/remove IOBs as r equired. ♦ Rep[...]

  • Page 37

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 37 UG144 Apr il 24, 2009 General Design Guidelines R -- DISCONTINUED PRODUCT - - Implementing the 1-Gigabit Ether net MAC in Y o ur Application The example design can be s tudied as an example of how to do the following: • Instantiate the core fr om HDL. • Sourc e and use the client-side i[...]

  • Page 38

    38 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 4: Designing with the Core R -- DISCONTINUED PRODUCT -- See also Appendix C, “Calculati ng DCM Phase-Shifting” to meet Spartan-3, Spartan-3E and Spartan-3A device setup and hold requir ements for external GMII. K e ep it Registered T o simplify timing and [...]

  • Page 39

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 39 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 5 Using the Client Side Data Path This chapter provides general guidelines for creating designs using the GEMAC core, including a detailed d escription of each client-side data flow in terface of the core. Definitions of the abbr ev[...]

  • Page 40

    40 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Frame parameter s (destination addr ess, sour ce address, l ength/type and opt ionally FCS) are supplied on the data bus according to the timing diagram. If the length/type field in the frame has[...]

  • Page 41

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 41 UG144 Apr il 24, 2009 Receiving Inbound Frames R -- DISCONTINUED PRODUCT - - F rame Reception with Errors Figur e 5-2 illustrates an unsuccessful frame r eceptio n (for example, a fragment frame or a frame with an incorr ect FCS). In this case, the rx_bad_frame signal is asserted to the cli[...]

  • Page 42

    42 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Client-Supplied FCS P a ssing If the GEMAC core is co nfigured to pass the FCS field to the client (see “Configur ation Registers,” on page 78 ), this is handled as shown in Fi gure 5-3 . In [...]

  • Page 43

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 43 UG144 Apr il 24, 2009 Receiving Inbound Frames R -- DISCONTINUED PRODUCT - - Maximum P er mitted F rame Length The maximum legal length of a frame specified in IEEE 802.3-2005 is 1518 bytes for non- VLAN tagged frames. VLAN tagged frames ma y be extended to 152 2 bytes. When jumbo frame han[...]

  • Page 44

    44 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Address Filter If the optional Address Filter is included in the core, the MAC is able to reject frames that do not contain a known addres s in their destination addr ess field. If a frame is rej[...]

  • Page 45

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 45 UG144 Apr il 24, 2009 Receiving Inbound Frames R -- DISCONTINUED PRODUCT - - T able 5-2: Bit Definition f or the Receiver St atistics V ector rx_statist ics_vector bit(s) Name Descrip tion 27 Addres s Match If the optiona l Addr ess Filter is included in the core, this bit is asserted if th[...]

  • Page 46

    46 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Ta b l e 5 - 3 provides conversion information agai nst pr evious versions of the GEMAC. 20 Out of Bounds Asserted if the previous frame exceeded the specified IEEE802. 3-2005 maximum legal lengt[...]

  • Page 47

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 47 UG144 Apr il 24, 2009 T ransmitting Outbound Frames R -- DISCONTINUED PRODUCT - - T ransmitting Outbound Frames Ethernet frames to be transmitted are pr esented to the client logic on the T ransmitter subset of the Client-Side Interface. For port definition, see “T ransmitter Interfa ce,?[...]

  • Page 48

    48 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Client-Supplied FCS P a ssing The transmission timing de picted in Figure 5-7 shows the GEMAC core co nfigured to have the FCS field passed in by the client. In this case, it is the responsibilit[...]

  • Page 49

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 49 UG144 Apr il 24, 2009 T ransmitting Outbound Frames R -- DISCONTINUED PRODUCT - - VLAN T agged F rames Figur e 5-9 illustrates tran smission of a VLAN ta gged fr ame (if enabled). The handshaking signals across the interface do not change; however , the VLAN typ e tag 81-00 must be supplied[...]

  • Page 50

    50 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- T ransmitter Stat istics V ector The statistics for the transmitted frame are contained within the tx_statistic_vector . The vector is driven synchronously by the transmitter clock, gtx_clk , fol[...]

  • Page 51

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 51 UG144 Apr il 24, 2009 T ransmitting Outbound Frames R -- DISCONTINUED PRODUCT - - T able 5-4: Bit Definition for the T ransmitter Statistic s V ector tx_statist ics_vector bit(s) Name Descripti on 31 Pause Frame Asserted if the previous frame was a pause frame that the MAC itself initiated [...]

  • Page 52

    52 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 5: Using the Client Side Data P ath R -- DISCONTINUED PRODUCT -- Ta b l e 5 - 5 provides conversion information agai nst pr evious versions of the GEMAC. T able 5-5: Tx Statistics con versio n to prev ious core GEMA C core versions V ersio n 8.5 tx_statisti cs[...]

  • Page 53

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 53 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 6 Using Flow Contr ol This chapter describes the operation of the fl ow-contr ol logic of the GEMAC core. The flow control block is designed to clause 31 of the IEEE 802.3-2005 standard. The MAC may be configured to transmit pause r[...]

  • Page 54

    54 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 6: Using Flow Contr ol R -- DISCONTINUED PRODUCT -- The user MAC on the left side has a refere nce clock slightly slower than the nominal 125 MHz. The link partner MAC on the right side has a refe rence clock slightly faster than the nominal 125 MHz. As a re s[...]

  • Page 55

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 55 UG144 Apr il 24, 2009 Overvie w of Flow Cont ro l R -- DISCONTINUED PRODUCT - - P ause Control F rames Control frames ar e a unique type of Ethe rnet frame, defined in clause 31 of the IEEE 802.3- 2005 standard. Contr ol frames are dif f er entiated from o ther frame types by a defined valu[...]

  • Page 56

    56 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 6: Using Flow Contr ol R -- DISCONTINUED PRODUCT -- Flow Contr ol Operation of the GEMA C T ransmitting a P A USE Control F rame Core-initiated P ause Request If the GEMAC core is co nfigured to support tran smit f low contr ol, the client can initiate a pause[...]

  • Page 57

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 57 UG144 Apr il 24, 2009 Flow Contr ol Operation of the GEMA C R -- DISCONTINUED PRODUCT - - Receiving a P ause Control F rame Core Initiated Respons e to a P ause Request An error fr ee control frame is a received frame matching the format of Figur e 6-2 . It must pass all standard r eceiver [...]

  • Page 58

    58 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 6: Using Flow Contr ol R -- DISCONTINUED PRODUCT -- Flow Contr ol Implementation Example This section provides a basic overview of a Flow Control implementation, using Figure 6-1 as a sample. T o summarize the example, the user MAC on the left hand side of the[...]

  • Page 59

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 59 UG144 Apr il 24, 2009 Flow Contr ol Implementation Example R -- DISCONTINUED PRODUCT - - Operation Figur e 6-4 illustrates the FIFO occupancy over a period of time. The following describes the s equence of flow contr ol operation. 1. The average FIFO occupancy of the user sy stem graduall y[...]

  • Page 60

    60 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 6: Using Flow Contr ol R -- DISCONTINUED PRODUCT --[...]

  • Page 61

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 61 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 7 Using the Physical Side Interface This chapter provides general guidelines fo r creating designs using the Physica l Side Interface of the GEMAC core. The physical side interface implements GMII-style signaling and is typically at[...]

  • Page 62

    62 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- Figure 7-1: External GMII T rans mitter Logic IP AD IBUFG IOB LOGIC gtx_clk BUFG gtx_clk_bufg gmii_tx_clk OBUF FDDRRSE IOB LOGIC OP AD DQ DQ '0' '1' DQ gmii_txd[0] OBUF OP [...]

  • Page 63

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 63 UG144 Apr il 24, 2009 Implementing Ext ernal GMII R -- DISCONTINUED PRODUCT - - GMII Receiv er Logic Spar tan-3, Spar tan-3E, Spar tan-3A and Vir te x-4 Devices A DCM must be used on the gmii_rx_clk clock path, as illustrated in Figur e 7-2 , to meet the input setup and hold requir ements f[...]

  • Page 64

    64 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- DCM Reset circuitr y A DCM reset module, not illustrate d in Figu re 7-2 , is also present and is instantiated in the example design ne xt to the DCM. Since th is logic must be r eliable whate[...]

  • Page 65

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 65 UG144 Apr il 24, 2009 Implementing Ext ernal GMII R -- DISCONTINUED PRODUCT - - Vir tex-5 De vices An IODELA Y component may be used on the cloc k, data and control paths, as illustrated in Figure 7- 3 . These can be used to either shift the input clock gmii_rx_clk or the data and control s[...]

  • Page 66

    66 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- Implementing External RGMII The HDL example design delivered with the cor e implements an external RGMII when RGMII is selected from the CORE Generator GUI (see Chapter 3, “Generating the Co[...]

  • Page 67

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 67 UG144 Apr il 24, 2009 Implementing Ext ernal RGMII R -- DISCONTINUED PRODUCT - - Figur e 7-4 shows that th e output transmitter signals ar e register ed on gtx_clk_bufg , in the FPGA fabric, including the encoded rgmii_tx_ctl_int signal, derived from the logical xor of gmii_tx_en_int and gm[...]

  • Page 68

    68 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- The logic required to forward the transmitter clock is also shown: this uses an ODDR regis ter so that the clock signal pr oduced incurs exactly on the same delay as the data and control si gn[...]

  • Page 69

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 69 UG144 Apr il 24, 2009 Implementing Ext ernal RGMII R -- DISCONTINUED PRODUCT - - Vir tex-5 De vices The same logic that is used in Figur e 7-5 can also be used without modification for V irtex-5 devices. However , an alternative solution has been adopted for the example de sign deliver ed w[...]

  • Page 70

    70 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- The logic required to forward the transmitter clock is also shown. It has ma tching logic to the data and control signals to pr ovide a kn own relationship between the signals. An IODELA Y com[...]

  • Page 71

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 71 UG144 Apr il 24, 2009 Implementing Ext ernal RGMII R -- DISCONTINUED PRODUCT - - Figure 7-7: External RGMI I Receiver Logic rgmii_rxc IBUFG IOB LOGIC IP AD rgmii_rxd[0] IBUF IP AD D Q 1-Gigabit Ethernet MAC Core gmii_rxd_reg[0] gmii_rx_dv_reg gmii_rx_er_reg gmii_rx_clk gmii_rxd[0] gmii_rx_d[...]

  • Page 72

    72 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- Vir tex-4 De vices Figur e 7-8 shows using the physical r eceiver interf ace of the core to create an external RGMII in a V irtex-4 device. The signal names and logic exactl y match those deli[...]

  • Page 73

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 73 UG144 Apr il 24, 2009 Implementing Ext ernal RGMII R -- DISCONTINUED PRODUCT - - • This can be achieved by connecting the reset_200ms signal to the reset_200ms_in signal at any level of example design HDL hierarchy . Figure 7-8: External RGMII Receiver Logic f or Vir tex-4 De vices 1-Giga[...]

  • Page 74

    74 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- Vir tex-5 De vices Figur e 7-9 shows using the physical r eceiver interf ace of the core to create an external RGMII in a V irtex-5 device. The signal names and logic exactl y match those deli[...]

  • Page 75

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 75 UG144 Apr il 24, 2009 Implementing Ext ernal RGMII R -- DISCONTINUED PRODUCT - - RGMII Inband Status Decoding Logic The inband status decoding logic is common to all device fam ilies. Figure 7-10 illustrates the decoding of RGMII inband status information. This information is received throu[...]

  • Page 76

    76 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 7: Using the Physi cal Side I nterface R -- DISCONTINUED PRODUCT -- Using the MDIO interface The MDIO interface is accessed thr ough th e optional management interface and is typically connected to the MDIO port of a physical-layer device to access its configu[...]

  • Page 77

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 77 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 8 Configuration and Status This chapter provides general guidelines f or configuring and monitoring the GEMAC core, including a detailed description of the client-si de management inter face and r egisters present in the cor e. It a[...]

  • Page 78

    78 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- Configuration Registers After a power -up or system reset, the client may reconf igure the core parameters using their defaults. Configuration changes can be written at any time. Both the receiver and t[...]

  • Page 79

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 79 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - Receiv er Configuration The register con tents for the two r eceiver configuration words ar e shown in Ta b l e 8 - 3 and Ta b l e 8 - 4 . T able 8-3: Receiver Configuration W ord 0 Bit Default Va [...]

  • Page 80

    80 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- T ransmitter Configuration The register contents for the T ransmitte r Configuration W ord ar e d escribed in Ta b l e 8 - 5 . 29 0 In-band FCS Enable W h e n t h i s b i t i s ‘ 1 , ’ t h e M A C r[...]

  • Page 81

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 81 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - Flow Control Configur ation Ta b l e 8 - 6 li sts the register contents for the Flow Control Configuration W ord. 29 0 In-band FCS Enable When this bit is ‘1,’ the MAC transmitter will expect t[...]

  • Page 82

    82 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- MDIO Configuration The register contents for the Management Configur ation W ord ar e described in Ta b l e 8 - 7 . Address Filter Configuration Ta b l e 8 - 8 through Ta b l e 8 - 1 2 describe the r eg[...]

  • Page 83

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 83 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - The Addr ess Filter can be programmed to r esp ond to four separate additional ad dresses stored in an addr ess table in the Addr ess Filter . Ta b l e 8 - 1 0 and Ta b l e 8 - 1 1 describe how the[...]

  • Page 84

    84 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- Reading fr om the configuration r egister words is similar , but the upper host_opcode bit should be ‘1,’ as shown in Figure 8- 2 . In this case, the contents of the r egister appear on host_rd_data[...]

  • Page 85

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 85 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - Accessing the Address T able T o write to a specific entry in the address table, you must fi rst write the least signi ficant 32- bits of the addr ess into the Add ress T able Co nfiguration (W ord[...]

  • Page 86

    86 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- MDIO Interf ace Introduction to MDIO The MDIO interface for 1 Gbps operation (and slower speeds) is defined in IEEE 802.3 clause 22. This is a two wire in terface consisting of a clock, mdc , and a shar[...]

  • Page 87

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 87 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - There ar e two different transaction types of MDIO for write and read. They ar e described in this section. Abbre v iations Used The following abbreviations apply for the remainder of this chapter [...]

  • Page 88

    88 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- Read T ransaction Figur e 8-7 shows a Read transaction; this is defined by OP=”10”. The addressed MMD (PHY AD) device ret urns the 16-bit wor d from the r egister at REGAD. For details of the reg is[...]

  • Page 89

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 89 UG144 Apr il 24, 2009 Using the Optional Mana g ement Interface R -- DISCONTINUED PRODUCT - - Figur e 8-8 shows access to the MDIO interfac e thr ough the Management Interface. For MDIO transactions, the f ollowing applies : • host_miim_sel is ‘1’ • host_opcode[1:0] maps to the OP ([...]

  • Page 90

    90 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- Access without the Management Interface If the optional management interface is om itted from the cor e, all of the relevant configuration settings descri bed in Ta b l e 8 - 3 through Ta b l e 8 - 6 ar[...]

  • Page 91

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 91 UG144 Apr il 24, 2009 Access without t he Management Int erface R -- DISCONTINUED PRODUCT - - 53 “Receiver Configuration Wo r d 1 ” bit 31 n/a Receiver Reset . When this bit is ‘1,’ the receiver is held in reset. This signal is an input to the reset circuit for the r eceiver block. [...]

  • Page 92

    92 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 8: Configurat ion and Status R -- DISCONTINUED PRODUCT -- 62 “Flow Control Configuration Wo r d ” bit 30 gtx_clk Receive Flow Control Enable . When this bit i s ‘ 1 , ’ r e c e i v e d f l o w c o n t r o l f r a m e s w i l l i n h i b i t the transmi[...]

  • Page 93

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 93 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 9 Constraining the Cor e This chapter defines the GEMAC core constr a int requirements. An exa mple UCF that implements the constraints de fined in this chapter is pr ovided with the HDL example design for the cor e. See the 1-Gigab[...]

  • Page 94

    94 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- PERIOD Constraints f or Clock Net s gtx_clk The clock provided to gtx_clk must be constrained for a clock fr equency of 12 5 MHz. The following UCF syntax shows the necessary constraints being applied to [...]

  • Page 95

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 95 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - The UCF syntax which follows targ ets the MDIO logic flip-flops and gr oups them together . Reduced clock period constraints are then appli ed. ######################################## #################### # MDIO Cons[...]

  • Page 96

    96 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- Timespecs f or Reset Logic within the Core Internally , the core is divided into clock/r e set domains that group elements with common clock and r eset signals. The res et circ uitry for one of thes e dom[...]

  • Page 97

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 97 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - GMII Input Setup/Hold Timing Figur e 9-1 and Ta b l e 9 - 1 illustrate the setup and hold time window for the i nput GMII signals. This is the worst-case data valid window presented to the FPGA device pins. Observe th[...]

  • Page 98

    98 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- The fixed phase-s hift is applied to the DCM using the f ollowing UCF syntax: INST *gmii_interface/gmii_rxc_dcm CL KOUT_PHASE_SHIFT = FIXED; INST *gmii_interface/gmii_rxc_dcm PH ASE_SHIFT = 0; The value o[...]

  • Page 99

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 99 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - Understanding Timing Repor t s f o r GMII Setup/Hold Timing Non-Vir tex-5 de vices Setup and Hold results for t he GMII input bus can be foun d in the data sheet se ction of the T iming Report. The results are self-ex[...]

  • Page 100

    100 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- Data Sheet report: ----------------- All values displayed in nanoseconds (ns) Setup/Hold to clock gmii_rx_clk ------------+------------+---------- --+------------------+--------+ | Setup to | Hold to | |[...]

  • Page 101

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 101 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - The implementation requir es 7.554 ns of hold. Figure 9-2 illustrates that this repr esents a figure of -0.446 ns relative to the following rising edge of the clock (since the IDELA Y has acted to delay the clock by [...]

  • Page 102

    102 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- The RGMII v2.0 is a 1.5 volt signal-lev el in terface. The 1.5 volt HSTL Class I SelectI O standard is used for RGMII interface p ins. Use the following constraints with the device IO B a n k i n g r u l[...]

  • Page 103

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 103 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - INST "rgmii_rxd<?>" TNM = IN_RGMII; INST "rgmii_rx_ctl" TNM = IN_RGMII; TIMEGRP "DDR_RISING" = FFS; TIMEGRP "DDR_FALLING" = FALLING FFS; TIMEGRP "IN_RGMII" OFFS[...]

  • Page 104

    104 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- INST *rgmii_interface/delay_rgmii_tx _clk IDELAY_TYPE = “FIXED”; INST *rgmii_interface/delay_rgmii_tx _clk ODELAY_VALUE = 25; INST *rgmii_interface/delay_rgmii_tx _clk DELAY_SRC = “O”; INST *rgmi[...]

  • Page 105

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 105 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - Understanding Timing Repor ts f or RGMII Setup/Hold timing Non-Vir tex-5 De vices Setup and Hold r esults for the RGMII i nput bus can be found in the data sheet section of the T iming Report. The results ar e self-e[...]

  • Page 106

    106 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT -- Data Sheet report: ----------------- All values displayed in nanoseconds (ns) Setup/Hold to clock rgmii_rxc ------------+------------+---------- --+------------------+--------+ | Setup to | Hold to | | C[...]

  • Page 107

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 107 UG144 Apr il 24, 2009 Required Constraint s R -- DISCONTINUED PRODUCT - - This is less than the 1 ns required, so ther e is slack. Equally for the –ve edge, we have –1 1.179 ns of setup—this edge is at time 12 ns and therefor e this equates to a setup of 0.821 ns. The implementation [...]

  • Page 108

    108 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 9: Constrai ning the Co re R -- DISCONTINUED PRODUCT --[...]

  • Page 109

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 109 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 10 Clocking and Resetting This chapter describes clock management co nsiderations that are associated with implementing the GEMAC core. It describes the clock management logic for all implementations of the core and how clock manag[...]

  • Page 110

    110 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 10: Clocking and Resett ing R -- DISCONTINUED PRODUCT -- With RGMII Standard Cloc king Scheme Figure 10- 2 illustrates the clock management used with an external RGMII inter face. All clocks illustrated have a fre quency of 125 MHz. The gtx_clk clock must be [...]

  • Page 111

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 111 UG144 Apr il 24, 2009 Multiple Cores R -- DISCONTINUED PRODUCT - - Note: Although not illustrated, if the optional Management Interface is used, host_clk can also be shared between cores. With RGMII Figure 10- 4 illustrates sharing clock r esources acr oss multiple instantiations of the co[...]

  • Page 112

    112 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 10: Clocking and Resett ing R -- DISCONTINUED PRODUCT -- Reset Conditions Internally , the core is divided up into clock/reset domains that gr oup together elements with common clock and r eset signals. The re set circuitry for one of these domains is illustr[...]

  • Page 113

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 113 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 1 1 Interfacing to Other Cor es Ethernet 1000Base-X PCS/PMA or SGMII Core The GEMAC core can be integrated in a si ngle device with the Et hernet 1000BASE-X PCS/PMA or SGMII core to extend cor e functionality to provide the followi[...]

  • Page 114

    114 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 11 : Interfacing to Other Cores R -- DISCONTINUED PRODUCT -- Integr ation to Provide 1000BASE-X PCS with TBI Figure 1 1- 1 illustrates the connections and clock management logic requir ed to interface the GEMAC core to the Ethern et 1000BASE-X PCS/PMA or S GM[...]

  • Page 115

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 115 UG144 Apr il 24, 2009 Ethernet 1000 Base-X PCS/PMA or SGMII Core R -- DISCONTINUED PRODUCT - - Integr ation to Provide 1000BASE-X PCS and PMA using a Roc ketIO Tr a n s c e i v e r Vir tex-4 De vices Figure 1 1-2 illustrates the connections and clock management logic requir ed to interface[...]

  • Page 116

    116 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 11 : Interfacing to Other Cores R -- DISCONTINUED PRODUCT -- Figure 1 1-2 illustrates the foll owing: • Direct internal connections are made between the GMII interfaces between the two cores. • If the GEMAC has been generated with th e optional Management[...]

  • Page 117

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 117 UG144 Apr il 24, 2009 Ethernet 1000 Base-X PCS/PMA or SGMII Core R -- DISCONTINUED PRODUCT - - Vir tex-5 LXT and SXT De vices Figure 1 1-3 illustrates the connections and clock management logic requir ed to interface the GEMAC core to the Ethern et 1000BASE-X PCS/PMA or S GMII core (when u[...]

  • Page 118

    118 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 11 : Interfacing to Other Cores R -- DISCONTINUED PRODUCT -- • Due to the embedded Receiver Elastic Buffer in the Ethernet 1000 BASE-X PCS/PMA or SGMII cor e , the entir e GMII is synchr onous to a single clock domain. For this rea so n , userclk2 is used a[...]

  • Page 119

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 119 UG144 Apr il 24, 2009 Ethernet Stat istics Core R -- DISCONTINUED PRODUCT - - Features of this configuration include: • Direct internal connections are made between the GMII interfaces between the two cores. • If the GEMAC has been generated with th e optional Management Interface, the[...]

  • Page 120

    120 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 11 : Interfacing to Other Cores R -- DISCONTINUED PRODUCT -- Figure 1 1-5 illustrates connecting the Ethern et Statistics core to the MAC. Figure 11-5: Interfacin g the Ethernet Statistics to th e 1-Gigabit Et hernet MA C Ethernet S t a ti s tic s Ex a mple D[...]

  • Page 121

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 121 UG144 Apr il 24, 2009 Ethernet Stat istics Core R -- DISCONTINUED PRODUCT - - The management interfaces of the two cores ca n be shar ed by avoidi ng bus conflict, as follows: • Selecting a dif ferent addr ess range for the st atistics to that of the M AC configuration regis ters. This i[...]

  • Page 122

    122 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 11 : Interfacing to Other Cores R -- DISCONTINUED PRODUCT --[...]

  • Page 123

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 123 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Chapter 12 Implementing Y our Design This chapter describes how to simulate an d implement your d esign containing the GEMAC core. Pre-implementation Sim ulation A unit delay st ructural model of the GEMAC cor e netlist is pr ovided as a C[...]

  • Page 124

    124 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 12: Implementing Y our Design R -- DISCONTINUED PRODUCT -- T o synthesize the design, run: $ xst -ifn top_level_module_name .scr See the XST User Gu ide for mor e information on creating pr oject and synthesis script files, and running the xst pr ogram. XST?[...]

  • Page 125

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 125 UG144 Apr il 24, 2009 P ost-Implementation Simulation R -- DISCONTINUED PRODUCT - - Placing-and-Routing the Design Execute the par command to place-and-r oute your design logic components (mapped physical logic cell s) contained within an NCD file in accordance wi th the layout and timing [...]

  • Page 126

    126 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Chapter 12: Implementing Y our Design R -- DISCONTINUED PRODUCT -- Using the Model For information about settin g up your simulator to use the pr e-implemented model, see the Xilinx Synthesis and V erific ation Design Gu ide included in your Xil inx softwar e install[...]

  • Page 127

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 127 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Appendix A Using the Client-Side FIFO The example design provide d with the GEMAC core contains a FIFO used on the client- side of the core. The sour ce code for the FIFO is provided, and may be used and adjusted for user application s. Th[...]

  • Page 128

    128 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix A: Using the Client-Side FIFO R -- DISCONTINUED PRODUCT -- Interfaces Tr a n s m i t F I F O Ta b l e A - 1 describ es the transmit FIFO client interface. For more information on the MAC client interface, see “T ransmitting Outbound Frames,” on page 47 .[...]

  • Page 129

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 129 UG144 Apr il 24, 2009 Interfaces R -- DISCONTINUED PRODUCT -- Receiv e FIFO Ta b l e A - 3 describes the recei ve FIFO client interface. For mor e information on the MAC client interface, see “Receiving Inbound Frames,” on page 39 . Ta b l e A - 4 describ es the receive FIFO LocalLink [...]

  • Page 130

    130 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix A: Using the Client-Side FIFO R -- DISCONTINUED PRODUCT -- Overview of LocalLink Interface Data Flow Data is transferr ed on the LocalLink interface fr om source to destination, with the flow being governed by the four active low control signals sof_n , eof_[...]

  • Page 131

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 131 UG144 Apr il 24, 2009 Functional Operat ion R -- DISCONTINUED PRODUCT -- Functional Operation Cloc k Requirements The FIFO is designed t o work with rx_clk and tx_clk running at MAC clock speeds up to 125 MHz. The rx_ll_clock s h o u l d b e n o s l o w e r t h a n t h e rx_clk . The tx_ll[...]

  • Page 132

    132 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix A: Using the Client-Side FIFO R -- DISCONTINUED PRODUCT -- V erilog The compiler directive FULL_DUPLEX_ONLY is defined to allow for r emoval of logic and performance constraints that ar e necessary on ly in half-duplex operation, that is, when using with the[...]

  • Page 133

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 133 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Appendix B Cor e V erification, Compliance, and Inter operability The GEMAC core has been verified with ex tensive simulation and har d ware testing. V erification b y Simulation A highly parameterizable transaction-based test bench (not p[...]

  • Page 134

    134 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix B: Core V erification, Compli ance, and Interopera bility R -- DISCONTINUED PRODUCT --[...]

  • Page 135

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 135 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Appendix C Calculating DCM Phase-Shifting DCM Phase-Shifting A DCM is used in the receiver clock path to meet the input setup and hold requir ements when using the core with an RGMII (see “Implementing External RGMII,” on page 66 ) and[...]

  • Page 136

    136 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix C: Calculating DCM Phase-Shifting R -- DISCONTINUED PRODUCT -- Perform a complete sweep o f phase-shift settings during your initial system test. Use only positive (0 to 255) phase-shif t settings, and us e a test range that covers a range of no less than 12[...]

  • Page 137

    1-Gigabit Ethernet MA C v8.5 User Guide www .xilinx.com 137 UG144 Apr il 24, 2009 R -- DISCONTINUED PRODUCT -- Appendix D Cor e Latency T ransmit P ath Latency As measured fr om a data octet accepted on tx_data[7:0] of the transmitter client-side interface, until that data octet appears on gmii_txd[7:0] of the physical side GMII style interface, th[...]

  • Page 138

    138 www .xilinx.com 1-Gigabit Ethernet MA C v8.5 Use r Guide UG144 Apr il 24, 2009 Appendix D: Core Latenc y R -- DISCONTINUED PRODUCT --[...]