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Xilinx UG078 manual

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Table of contents for the manual

  • Page 1

    R Virtex-4 LX/SX Prototype Platform User Guide UG078 (v1 .2) May 2 4, 2006 P/N 040 2226-06[...]

  • Page 2

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com UG078 (v 1.2) Ma y 24, 2006 Xilinx is d isclosi ng this Doc ument and Intellectu al Proper ty (hereina fter “the D esign”) to y ou for use i n the deve lopment of de signs t o operat e on, or interface with Xili nx FPGAs. Except as stated h erein, non e of the D esign may be copi ed, rep roduced[...]

  • Page 3

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 3 UG078 (v 1.2) May 24, 20 06 Preface: About This Guide Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Additional Reso urces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .[...]

  • Page 4

    4 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 R[...]

  • Page 5

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 5 UG078 (v 1.2) May 24, 20 06 R Preface About This Guide This user g uide desc rib es the fea tures and operation of the Virtex™-4 prot o type platfo rm and de scr ibes ho w to confi gure ch ains of F PGAs and seri al PROMs. Guide Con tents This ma nual conta ins one chapter: • “Virtex -4 LX/S[...]

  • Page 6

    6 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Preface : About This Guide R Online Docu ment The following conventions are used in this document: Italic font Varia bles in a synt ax stat emen t for wh ich y ou m ust suppl y values ngdbui ld design_ name References to othe r manuals See the Developmen t System Referen[...]

  • Page 7

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 7 UG078 (v 1.2) May 24, 20 06 R Virtex-4 LX/SX Prototype Platfo rm Package Conten ts • Xilinx Virtex™-4 proto t ype platfo rm board • User guide • Device vacuum tool • Headers for t est points • CD-ROM • One low-voltage, 14 -pin, dual-inlin e package (DIP) crystal oscillator CD-ROM Con[...]

  • Page 8

    8 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Introduction R Features • Independent power supply jacks fo r VCCINT , VCCO, and VCCAUX • Selectable VCCO-enable pin s fo r each SelectIO™ bank • Configuration port for use with Paralle l Cable III and Parallel Cable IV cables • 32 clock inp uts ♦ 4 different[...]

  • Page 9

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 9 UG078 (v 1.2) May 24, 20 06 Introduction R Figure 1 shows a bl ock dia gram of the board. Figure 1: Virtex-4 LX/S X Prototype Platform Block Diagram Vir tex-4 DUT Upstream System ACE Interface Connector LEDs UG078_01_101204 DONE LED INIT LED VBA TT PROGRAM User RESET T o T est P oints on All Pins [...]

  • Page 10

    10 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R Detailed De scription The Virtex-4 prototype platfo rm board is shown in Figure 2 . Each feature is detailed in the numbered s ecti ons that follow. 1. Power Switch The board has an onboard power supply and an ON|O FF power switch. When lit , a g[...]

  • Page 11

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 11 UG078 (v 1.2) May 24, 20 06 Detailed Description R Off Position In the OFF position, the pow er switch disables all mo des of powering the D UT. Power Enab l e Jumpers For ea ch powe r supply there are heade rs marked SUPPLY on one side and JA CK on the other s i de. Appropriate placem en ts of j[...]

  • Page 12

    12 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 3. Configurat ion Ports These header s can be used t o connect a Parallel Ca bl e III o r Parallel Cable IV cable to the board (see Table 2 ) an d support all Virtex-4 device co nfiguration modes. See Table 3 fo r connecting the cables to the con[...]

  • Page 13

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 13 UG078 (v 1.2) May 24, 20 06 Detailed Description R 4. JT AG Chain Jumper J17 pro vi des the ability to have the Virtex-4 in the JT AG chain or remove it from the JT AG chai n. Note: The Vir tex-4 device mu st not be in the socket w hen detecting th e ISPROM in the chain. 5. JT AG Termination Ju m[...]

  • Page 14

    14 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 6a. Upstream System ACE Int erface Connector The upstream System ACE inte rface connector, as s h own in Figure 4 , can be used to configure the DUT. Any JT AG configuration stream can source t his connector. For example, a System ACE controller [...]

  • Page 15

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 15 UG078 (v 1.2) May 24, 20 06 Detailed Description R 6c. Upstream I nterface Connector The upstream interface co n necto r, as shown in Figure 6 , is used to configure the DUT in select map or slave-serial mode. This connector can be sourced by a downstream interface connector o f another prototype[...]

  • Page 16

    16 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 6d. Downstream In terface Connector The downstream interfa ce connector, as shown in Figure 7 , passes serial config uration information t o the DUT in the downstream prototype platfo rm board. 7. Prototypin g Area The prototyping area accomm oda[...]

  • Page 17

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 17 UG078 (v 1.2) May 24, 20 06 Detailed Description R 10. Oscil lator Sockets The board h as four crystal oscilla tor sockets, all wired for standard LVTT L-type oscill ators. These sockets connect to the DUT clock pads as shown in Table 4 and Table 5 . Onboard termination resistors can be chang ed [...]

  • Page 18

    18 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 1 1. Dif ferential Clock Inputs In addition to the oscillator sockets, there are eight 50 Ω SMA c onne ctors that al low connection to an external function generato r. These connect to the DUT clock pads as shown in Table 6 and Table 7 . They ca[...]

  • Page 19

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 19 UG078 (v 1.2) May 24, 20 06 Detailed Description R 12. DUT Socket The DUT socket contains the user FPGA, referred to as the de vice unde r test (DUT ). Th e DUT must be oriented using the P1 indicator on the board. Caution! Failur e to insert the devi ce to the proper orie ntation can dam age the[...]

  • Page 20

    20 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R Table 9 : Breakout Clock Pin Connections for FF1 148 and FF1513 FF1 148 F F1513 Label Clock Name Pin Number Clock Name Pin Number Breakout Area IO_L4P _GC_LC_3 E13 IO_ L4P_GC_LC_3 J 21 IO_L4 N_GC_V REF_LC _3 E17 IO _L4N_GC_V REF_ LC_3 J20 IO_L5 P[...]

  • Page 21

    Virtex-4 LX/SX Prot otype Platform www.xilinx.com 21 UG078 (v 1.2) May 24, 20 06 Detailed Description R 14. User LEDs (Active-Hig h) There are 16 a ct ive-high use r LEDs on the board. Befo re configuration, the LEDs reflect the statu s of t he co nfiguratio n mode pins. Du ring configu ration, the LED s are in a hi gh- impedance conditi on. After [...]

  • Page 22

    22 www.xilinx.com Virtex-4 LX/SX Proto type Platform UG078 (v 1.2) May 24, 2006 Detailed Des cription R 15. PROGRAM Switch The active-low PROGRAM switch, when pressed, g rounds the program pin on the DUT. 16. RESET Switch (Activ e-Low) The RESET switch connects to a standard I/O pin on the DUT, allowing the use r, after configuration, to res et the[...]