Texas Instruments TMS320F2801 manual

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Table of contents for the manual

  • Page 1

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 Digital Signal Processors Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessari[...]

  • Page 2

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Contents 1 F280x, F2801x, C280x DSPs .................................................................................................. 9 1.1 Features ....................[...]

  • Page 3

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 4.4 Enhanced CAP Modules (eCAP1/2/3/4) ................................................................................ 58 4.5 Enhanced QEP Modules (eQEP1/2) .............[...]

  • Page 4

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.13 ROM Timing (C280x only) .............................................................................................. 132 7 Migrating From F280x Devices to C280x Dev[...]

  • Page 5

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 List of Figures 2-1 TMS320F2809, TMS320F2808 100-Pin PZ LQFP (Top View) ............................................................ 15 2-2 TMS320F2806 100-Pin PZ LQFP (To[...]

  • Page 6

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6-9 Warm Reset ..................................................................................................................... 108 6-10 Example of Effect of Writing [...]

  • Page 7

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 List of Tables 2-1 Hardware Features (100-MHz Devices) ....................................................................................... 12 2-2 Hardware Features (60[...]

  • Page 8

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6-9 XCLKIN Timing Requirements - PLL Enabled ............................................................................. 105 6-10 XCLKIN Timing Requirements - PLL Disabl[...]

  • Page 9

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Digital Signal Processors Check for Samples: TMS320F2809 , TMS320F2808 , TMS320F2806 , TMS320F2802 , TMS320F2801 , TMS320C2802 , TMS320C2801 , TMS320F28016 , TMS320F28015 [...]

  • Page 10

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com • Package Options • Temperature Options: – Thin Quad Flatpack (PZ) – A: –40°C to 85°C (PZ, GGM, ZGM) – MicroStar BGA™ (GGM, ZGM) – S: –40°C to 125°C [...]

  • Page 11

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 2 Introduction The TMS320F2809, TMS320F2808, TMS320F2806, TMS320F2802, TMS320F2801, TMS320F28015, TMS320F28016, TMS320C2802, and TMS320C2801 devices, members of the TMS320[...]

  • Page 12

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 2-1. Hardware Features (100-MHz Devices) FEATURE TYPE (1) F2809 F2808 F2806 F2802 F2801 C2802 C2801 Instruction cycle (at 100 MHz) – 10 ns 10 ns 10 ns 10 ns 10 ns [...]

  • Page 13

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 2-2. Hardware Features (60-MHz Devices) FEATURE TYPE (1) F2802-60 F2801-60 F28016 F28015 Instruction cycle (at 60 MHz) – 16.67 ns 16.67 ns 16.67 ns 16.67 ns 6K 6K [...]

  • Page 14

    50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPIO0/EPWM1A TCK TMS TDI GPIO23/EQEP1I/SPISTEC/SCIRXDB GP[...]

  • Page 15

    50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPIO3/EPWM2B/SPISOMID GPIO0/EPWM1A GPIO2/EPWM2A GPIO1/EPW[...]

  • Page 16

    50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPIO0/EPWM1A GPIO2/EPWM2A GPIO1/EPWM1B GPIO34 ADCRESEXT A[...]

  • Page 17

    50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1 2 3 4 5 6 7 8 9 10 1 1 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPIO0/EPWM1A GPIO2/EPWM2A GPIO1/EPWM1B GPIO34 ADCRESEXT A[...]

  • Page 18

    4 C B A D E 2 1 3 K F G H J 5 7 6 9 8 10 Bottom V iew TRST TCK TDI TDO TMS EMU0 EMU1 V DD3VFL TEST1 TEST2 XCLKOUT XCLKIN X1 X2 XRS GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO9 GPIO8 GPIO10 GPIO1 1 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31 GPIO[...]

  • Page 19

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 2.2 Signal Descriptions Table 2-3 describes the signals on the 280x devices. All digital inputs are TTL-compatible. All outputs are 3.3 V with CMOS levels. Inputs are not [...]

  • Page 20

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Signal Descriptions (continued) PIN NO. GGM/ NAME DESCRIPTION (1) PZ ZGM PIN # BALL # Internal/External Oscillator Input. To use the internal oscillator, a quartz crystal [...]

  • Page 21

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Signal Descriptions (continued) PIN NO. GGM/ NAME DESCRIPTION (1) PZ ZGM PIN # BALL # V DD 10 E2 V DD 42 G6 V DD 59 F10 CPU and Logic Digital Power Pins (1.8 V) V DD 68 D7[...]

  • Page 22

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Signal Descriptions (continued) PIN NO. GGM/ NAME DESCRIPTION (1) PZ ZGM PIN # BALL # GPIO6 General purpose input/output 6 (I/O/Z) (4) EPWM4A Enhanced PWM4 output A and HR[...]

  • Page 23

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Signal Descriptions (continued) PIN NO. GGM/ NAME DESCRIPTION (1) PZ ZGM PIN # BALL # GPIO20 General purpose input/output 20 (I/O/Z) (5) EQEP1A Enhanced QEP1 input A (I) 6[...]

  • Page 24

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Signal Descriptions (continued) PIN NO. GGM/ NAME DESCRIPTION (1) PZ ZGM PIN # BALL # GPIO33 General-Purpose Input/Output 33 (I/O/Z) (1) SCLA I2C clock open-drain bidirect[...]

  • Page 25

    INT[12:1] Real- Time JT AG (TDI, TDO, TRST , TCK, TMS, EMU0, EMU1) C28x CPU (100 MHz) NMI , INT13 Memory Bus INT14 SYSCLKOUT RS CLKIN 12-Bit ADC ADCSOCA/B SOCA/B 16 Channels 12 6 32 XCLK OUT XRS XCLKIN X1 X2 32 System Control (Oscillator , PLL, Peripheral Clocking, Low-Power Modes, Watchdog) ePWM1/2/3/4/5/6 (12 PWM outputs, 6 trip zones, 6 timers 1[...]

  • Page 26

    0x00 0000 Block Start Address Data Space Prog Space M0 V ector − RAM (32 x 32) (Enabled if VMAP = 0) M1 SARAM (1K y 16) 0x00 0400 Peripheral Frame 0 0x00 0800 0x00 0D00 Peripheral Frame 1 (protected) 0x00 6000 Peripheral Frame 2 (protected) 0x00 7000 L0 SARAM (0-wait) (4K y 16, Secure Zone, Dual-Mapped) 0x00 8000 L1 SARAM (0-wait) (4K y 16, Secur[...]

  • Page 27

    0x00 0000 Block Start Address Data Space Prog Space M0 SARAM (1K y 16) M1 SARAM (1K y 16) 0x00 0400 Peripheral Frame 0 0x00 0800 0x00 0D00 Peripheral Frame 1 (protected) 0x00 6000 Peripheral Frame 2 (protected) 0x00 7000 L0 SARAM (0-wait) (4K y 16, Secure Zone, Dual-Mapped) 0x00 8000 L1 SARAM (0-wait) (4K y 16, Secure Zone, Dual-Mapped) 0x00 9000 H[...]

  • Page 28

    0x00 0000 Block Start Address Data Space 0x00 0400 0x00 0800 0x00 0D00 0x00 6000 0x00 7000 0x00 8000 0x00 9000 0x00 A000 0x3D 7800 0x3D 7C00 0x3F 7FF8 0x3F 8000 0x3F 9000 0x3F A000 0x3F F000 0x3F FFC0 OTP (1K y 16, Secure Zone) FLASH (32K y 16, Secure Zone) Boot ROM (4K y 16) Low 64K [0000−FFFF] (24x/240x equivalent data space) High 64K [3F0000 ?[...]

  • Page 29

    0x00 0000 Block Start Address 0x00 0400 0x00 0800 0x00 0D00 0x00 6000 0x00 7000 0x00 8000 0x00 9000 0x3D 7800 0x3F 0000 0x3F 7FF8 0x3F 8000 0x3F 9000 0x3F F000 0x3F FFC0 OTP (F2802 Only) (A) (1K y 16, Secure Zone) FLASH (F2802) or ROM (C2802) (32K y 16, Secure Zone) L0 (0-wait) (4K y 16, Secure Zone, Dual-Mapped) Boot ROM (4K y 16) 128-bit Password[...]

  • Page 30

    0x00 0000 Block Start Address 0x00 0400 0x00 0800 0x00 0D00 0x00 6000 0x00 7000 0x00 8000 0x00 9000 0x3D 7800 0x3F 4000 0x3F 7FF8 0x3F 8000 0x3F 9000 0x3F F000 0x3F FFC0 OTP (F2801/F2801x Only) (A) (1K y 16, Secure Zone) FLASH (F2801) or ROM (C2801) (16K y 16, Secure Zone) L0 (0-wait) (4K y 16, Secure Zone, Dual-Mapped) Boot ROM (4K y 16) 128-bit P[...]

  • Page 31

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 3-1. Addresses of Flash Sectors in F2809 ADDRESS RANGE PROGRAM AND DATA SPACE 0x3D 8000 – 0x3D BFFF Sector H (16K x 16) 0x3D C000 – 0x3D FFFF Sector G (16K x 16)[...]

  • Page 32

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 3-4. Addresses of Flash Sectors in F2801, F28015, F28016 ADDRESS RANGE PROGRAM AND DATA SPACE 0x3F 4000 – 0x3F 4FFF Sector D (4K x 16) 0x3F 5000 – 0x3F 5FFF Sect[...]

  • Page 33

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 The wait-states for the various spaces in the memory map area are listed in Table 3-6 . Table 3-6. Wait-states AREA WAIT-STATES COMMENTS M0 and M1 SARAMs 0-wait Fixed Peri[...]

  • Page 34

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 3.2 Brief Descriptions 3.2.1 C28x CPU The C28x™ DSP generation is the newest member of the TMS320C2000™ DSP platform. The C28x is a very efficient C/C++ engine, enabli[...]

  • Page 35

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 3.2.4 Real-Time JTAG and Analysis The 280x implements the standard IEEE 1149.1 JTAG interface. Additionally, the 280x supports real-time mode of operation whereby the cont[...]

  • Page 36

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 3.2.8 L0, L1, H0 SARAMs The F2809 and F2808 each contain an additional 16K x 16 of single-access RAM, divided into 3 blocks (L0-4K, L1-4K, H0-8K). The F2806 contains an ad[...]

  • Page 37

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 3.2.10 Security The 280x devices support high levels of security to protect the user firmware from being reverse engineered. The security features a 128-bit password (hard[...]

  • Page 38

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 3.2.11 Peripheral Interrupt Expansion (PIE) Block The PIE block serves to multiplex numerous interrupt sources into a smaller set of interrupt inputs. The PIE block can su[...]

  • Page 39

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 3.2.17 Peripheral Frames 0, 1, 2 (PFn) The 280x segregate peripherals into three sections. The mapping of peripherals is as follows: PF0: PIE: PIE Interrupt Enable and Con[...]

  • Page 40

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com eQEP: The enhanced QEP peripheral uses a 32-bit position counter, supports low-speed measurement using capture unit and high-speed measurement using a 32-bit unit timer. T[...]

  • Page 41

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 3-8. Peripheral Frame 0 Registers (1) (2) NAME ADDRESS RANGE SIZE (x16) ACCESS TYPE (3) Device Emulation Registers 0x0880 – 0x09FF 384 EALLOW protected EALLOW prot[...]

  • Page 42

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 3-10. Peripheral Frame 2 Registers (1) (2) NAME ADDRESS RANGE SIZE (x16) ACCESS TYPE System Control Registers 0x7010 – 0x702F 32 EALLOW Protected SPI-A Registers 0[...]

  • Page 43

    XINT2 C28 CPU CPUTIMER2 (ReservedforDSP/BIOS) CPUTIMER0 W atchdog Peripherals (SPI,SCI,I2C,eCAN,ePWM,eCAP ,eQEP ,ADC) TINT0 InterruptControl XNMICR(15:0) XINT1 InterruptControl XINT1 XINT1CR(15:0) InterruptControl XINT2 XINT2CR(15:0) GPIO MUX WDINT INT1to INT12 INT13 INT14 NMI XINT1CTR(15:0) XINT2C[...]

  • Page 44

    INT12 MUX INT1 1 INT2 INT1 CPU (Enable) (Flag) INTx INTx.8 PIEIERx(8:1) PIEIFRx(8:1) MUX INTx.7 INTx.6 INTx.5 INTx.4 INTx.3 INTx.2 INTx.1 From Peripherals or External Interrupts (Enable) (Flag) IER(12:1) IFR(12:1) Global Enable INTM 1 0 PIEACKx (Enable/Flag) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TM[...]

  • Page 45

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 3-13. PIE Configuration and Control Registers NAME ADDRESS SIZE (x16) DESCRIPTION (1) PIECTRL 0x0CE0 1 PIE, Control Register PIEACK 0x0CE1 1 PIE, Acknowledge Registe[...]

  • Page 46

    PLL X1 X2 Power Modes Control W atchdog Block 28x CPU Peripheral Bus Low-Speed Peripherals SCI-A/B, SPI-A/B/C/D Peripheral Registers High-Speed Prescaler Low-Speed Prescaler Clock Enables GPIO MUX System Control Registers XCLKIN ADC Registers 12-Bit ADC 16 ADC inputs LSPCLK I/O Peripheral Reset SYSCLKOUT (A) XRS Reset GPIOs Peripheral Registers I/O[...]

  • Page 47

    X1 XCLKIN (3.3-V clock input) On chip oscillator X2 xor PLLSTS[OSCOFF] OSCCLK PLL VCOCLK 4-bit PLL Select (PLLCR) OSCCLK or VCOCLK CLKIN OSCCLK 0 PLLSTS[PLLOFF] n n ≠ 0 /2 PLLSTS[CLKINDIV] TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – RE[...]

  • Page 48

    External Clock Signal (T oggling 0 −V D DIO ) XCLKIN X2 NC X1 External Clock Signal (T oggling 0 −V D D ) XCLKIN X2 NC X1 C L1 X2 X1 Crystal C L2 XCLKIN TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com The three poss[...]

  • Page 49

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 3.6.1.2 PLL-Based Clock Module The 280x devices have an on-chip, PLL-based clock module. This module provides all the necessary clocking signals for the device, as well as[...]

  • Page 50

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 3.6.1.3 Loss of Input Clock In PLL-enabled and PLL-bypass mode, if the input clock OSCCLK is removed or absent, the PLL will still issue a limp-mode clock. The limp-mode c[...]

  • Page 51

    /512 OSCCLK WDCR (WDPS(2:0)) WDCLK WDCNTR(7:0) WDKEY(7:0) Good Key 101 WDCR (WDCHK(2:0)) Bad WDCHK Key WDCR (WDDIS) Clear Counter SCSR (WDENINT) W atchdog Prescaler Generate Output Pulse (512 OSCCLKs) 8-Bit W atchdog Counter CLR WDRST WDINT W atchdog 55 + AA Key Detector XRS Core-reset WDRST (A) Internal Pullup TMS320F2809, TMS320F2808, TMS320F2806[...]

  • Page 52

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 3.7 Low-Power Modes Block The low-power modes on the 280x are similar to the 240x devices. Table 3-18 summarizes the various modes. Table 3-18. Low-Power Modes MODE LPMCR0[...]

  • Page 53

    Borrow Reset T imer Reload SYSCLKOUT TCR.4 (T imer Start Status) TINT 16-Bit T imer Divide-Down TDDRH:TDDR 32-Bit T imer Period PRDH:PRD 32-Bit Counter TIMH:TIM 16-Bit Prescale Counter PSCH:PSC Borrow TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2[...]

  • Page 54

    INT1 to INT12 INT14 C28x TINT2 TINT0 PIE CPU- TIMER0 CPU- TIMER2 (Reservedfor DSP/BIOS) INT13 TINT1 CPU- TIMER1 XINT13 TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com In the 280x devices, the timer interrupt[...]

  • Page 55

    PIE TZ1 to TZ6 Peripheral Bus ePWM1 module ePWM2 module ePWMx module EPWM1SYNCI EPWM2SYNCI EPWM2SYNCO EPWMxSYNCI EPWMxSYNCO ADC GPIO MUX EPWM1SYNCI EPWM1SYNCO ADCSOCx0 EPWMxA EPWMxB EPWM2A EPWM2B EPWM1A EPWM1B EPWM1INT EPWM1SOC EPWM2INT EPWM2SOC EPWMxINT EPWMxSOC to eCAP1 module (sync in) TZ1 to TZ6 TZ1 to TZ6 . EPWM1SYNCO TMS320F2809, TMS320F2808,[...]

  • Page 56

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 4-2. ePWM Control and Status Registers SIZE (x16) / NAME ePWM1 ePWM2 ePWM3 ePWM4 ePWM5 ePWM6 DESCRIPTION #SHADOW TBCTL 0x6800 0x6840 0x6880 0x68C0 0x6900 0x6940 1 / [...]

  • Page 57

    CTR = PRD TBPRD Shadow (16) TBPRD Active (16) Counter Up/Down (16-Bit) TBCNT Active (16) TBCTL[PHSEN] TBCTL[SWFSYNC] (Software-Forced Sync) EPWMxSYNCI CTR = ZERO CTR_Dir CTR = CMPB Disabled Sync In/Out Select Mux TBCTL[SYNCOSEL] EPWMxSYNCO TBPHS Active (24) 16 8 TBPHSHR (8) Phase Control Time-Base (TB) CTR = CMP A CMP A Active (24) 16 CMP A Shadow [...]

  • Page 58

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 4.3 Hi-Resolution PWM (HRPWM) The HRPWM module offers PWM resolution (time granularity) which is significantly better than what can be achieved using conventionally derive[...]

  • Page 59

    TSCTR (counter−32 bit) RST CAP1 (APRD active) LD CAP2 (ACMP active) LD CAP3 (APRD shadow) LD CAP4 (ACMP shadow) LD Continuous / Oneshot Capture Control LD1 LD2 LD3 LD4 32 32 PRD [0−31] CMP [0−31] CTR [0−31] eCAPx Interrupt T rigger and Flag control to PIE CTR=CMP 32 32 32 32 32 ACMP shadow Event Pre-scale CTRPHS (phase register−32 bit) SY[...]

  • Page 60

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 4-3. eCAP Control and Status Registers SIZE NAME eCAP1 eCAP2 eCAP3 eCAP4 DESCRIPTION (x16) TSCTR 0x6A00 0x6A20 0x6A40 0x6A60 2 Time-Stamp Counter CTRPHS 0x6A02 0x6A2[...]

  • Page 61

    QWDTMR QWDPRD 16 QWDOG UTIME QUPRD QUTMR 32 UT OUT WDT OUT Quadrature capture unit (QCAP) QCPRDLA T QCTMRLA T 16 QFLG QEPSTS QEPCTL Registers used by multiple units QCLK QDIR QI QS PHE PCSOUT Quadrature decoder (QDU) QDECCTL 16 Position counter/ control unit (PCCU) QPOSLA T QPOSSLA T 16 QPOSILA T EQEPxAIN EQEPxBIN EQEPxIIN EQEPxIOUT EQEPxIOE EQEPxS[...]

  • Page 62

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 4-4. eQEP Control and Status Registers eQEP1 eQEP1 eQEP2 NAME SIZE(x16)/ REGISTER DESCRIPTION ADDRESS ADDRESS #SHADOW QPOSCNT 0x6B00 0x6B40 2/0 eQEP Position Counter[...]

  • Page 63

    Digital Value + 0, Digital Value + 40 96 Input A nalog Voltage * ADCLO 3 when input ≤ 0 V when 0 V < input < 3 V when input ≥ 3 V Digital Value + 4095, TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 4.6 Enhan[...]

  • Page 64

    Result Registers EPWMSOCB S/W GPIO/XINT2 _ADCSOC EPWMSOCA S/W Sequencer 2 Sequencer 1 SOC SOC ADC Control Registers 70B7h 70B0h 70AFh 70A8h Result Reg 15 Result Reg 8 Result Reg 7 Result Reg 1 Result Reg 0 Module ADC 12-Bit Analog MUX ADCINA0 ADCINA7 ADCINB0 ADCINB7 System Control Block High-Speed Prescaler HSPCLK ADCENCLK DSP SYSCLKOUT S/H S/H HAL[...]

  • Page 65

    ADCINA[7:0] ADCINB[7:0] ADCLO ADCREFIN ADC External Current Bias Resistor ADCRESEXT ADCREFP V DD 1A18 V DD 2A18 V SS1AG ND V SS2AG ND V DD AIO V SSAIO V DD A2 V SSA2 ADC Reference Positive Output ADCREFM ADC Reference Medium Output ADC Power ADC Analog and Reference I/O Power Analog input 0−3 V with respect to ADCLO Connect to analog ground 22 k [...]

  • Page 66

    ADCINA[7:0] ADCINB[7:0] ADCLO ADCREFIN ADC External Current Bias Resistor ADCRESEXT ADCREFP V DD 1A18 V DD 2A18 V SS1AG ND V SS2AG ND V DD AIO V SSAIO V DD A2 V SSA2 ADC Reference Positive Output ADCREFM ADC Reference Medium Output ADC Analog Power ADC Analog and Reference I/O Power Analog input 0−3 V with respect to ADCLO Connect to Analog Groun[...]

  • Page 67

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 4.6.2 ADC Registers The ADC operation is configured, controlled, and monitored by the registers listed in Table 4-5 . Table 4-5. ADC Registers (1) NAME ADDRESS (1) ADDRESS[...]

  • Page 68

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 4.7 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) The CAN module has the following features: • Fully compliant with CAN protocol, version 2.0B • [...]

  • Page 69

    Mailbox RAM (512 Bytes) 32-Message Mailbox of 4 × 32-Bit W ords Memory Management Unit CPU Interface, Receive Control Unit, T imer Management Unit eCAN Memory (512 Bytes) Registers and Message Objects Control 32 32 Message Controller 32 32 32 32 32 32 eCAN Protocol Kernel Receive Buffer T ransmit Buffer Control Buffer Status Buffer Enhanced CAN Co[...]

  • Page 70

    Mailbox Enable − CANME Mailbox Direction − CANMD T ransmission Request Set − CANTRS T ransmission Request Reset − CANTRR T ransmission Acknowledge − CANT A Abort Acknowledge − CANAA Received Message Pending − CANRMP Received Message Lost − CANRML Remote Frame Pending − CANRFP Global Acceptance Mask − CANGAM Master Control − CA[...]

  • Page 71

    Mailbox Enable − CANME Mailbox Direction − CANMD T ransmission Request Set − CANTRS T ransmission Request Reset − CANTRR T ransmission Acknowledge − CANT A Abort Acknowledge − CANAA Received Message Pending − CANRMP Received Message Lost − CANRML Remote Frame Pending − CANRFP Global Acceptance Mask − CANGAM Master Control − CA[...]

  • Page 72

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com The CAN registers listed in Table 4-7 are used by the CPU to configure and control the CAN controller and the message objects. eCAN control registers only support 32-bit r[...]

  • Page 73

    Baud rate = LSPCLK 16 LSPCLK (BRR ) 1) * 8 when BRR ≠ 0 Baud rate = when BRR = 0 Max bit rate + 100 MHz 16 + 6.25 10 6 b ń s Max bit rate + 60 M Hz 16 + 3.75 10 6 b ń s TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 200[...]

  • Page 74

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Enhanced features: • Auto baud-detect hardware logic • 16-level transmit/receive FIFO The SCI port operation is configured and controlled by the registers listed in Ta[...]

  • Page 75

    TX FIFO _0 LSPCLK WUT Frame Format and Mode Even/Odd Enable Parity SCI RX Interrupt select logic BRKDT RXRDY SCIRXST .6 SCICTL1.3 8 SCICTL2.1 RX/BK INT ENA SCIRXD SCIRXST .1 TXENA SCI TX Interrupt select logic TX EMPTY TXRDY SCICTL2.0 TX INT ENA SCITXD RXENA SCIRXD RXW AKE SCICTL1.6 RX ERR INT ENA TXW AKE SCITXD SCICCR.6 SCICCR.5 SCITXBUF .7-0 SCIH[...]

  • Page 76

    Baud rate = LSPCLK 4 LSPCLK (SPIB RR ) 1) when SPIBRR = 3 to 127 Baud rate = when SPIBRR = 0,1, 2 TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 4.9 Serial Peripheral Interface (SPI) Modules (SPI-A, SPI-B, SPI-C, SPI-D[...]

  • Page 77

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 The SPI port operation is configured and controlled by the registers listed in Table 4-10 through Table 4-13 . Table 4-10. SPI-A Registers NAME ADDRESS SIZE (x16) DESCRIPT[...]

  • Page 78

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 4-12. SPI-C Registers NAME ADDRESS SIZE (x16) DESCRIPTION (1) SPICCR 0x7760 1 SPI-C Configuration Control Register SPICTL 0x7761 1 SPI-C Operation Control Register S[...]

  • Page 79

    S SPICTL.0 SPI INT FLAG SPI INT E N A SPISTS.6 S Clock Polarity T alk LSPCLK 4 5 6 1 2 3 0 0 1 2 3 SPI Bit Rate State Control SPIRXBUF Buffer Register Clock Phase Receiver Overrun Flag SPICTL.4 Overrun INT ENA SPICCR.3 − 0 SPIBRR.6 − 0 SPICCR.6 SPICTL.3 SPIDA T .15 − 0 SPICTL.1 M S M Master/Slave SPISTS.7 SPIDA T Data Register M S SPICTL.2 SP[...]

  • Page 80

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 4.10 Inter-Integrated Circuit (I2C) The 280x device contains one I2C Serial Port. Figure 4-15 shows how the I2C peripheral module interfaces within the 280x device. The I2[...]

  • Page 81

    SYSRS Data[16] SYSCLKOUT Data[16] Addr[16] Control I2CINT1A I2CINT2A C28X CPU GPIO MUX I 2 C−A System Control Block I2CAENCLK PIE Block SDAA SCLA Peripheral Bus TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 A. The I[...]

  • Page 82

    GPxDA T (read) Input Qualification GPxMUX1/2 High Impedance Output Control GPIOx pin XRS 0 = Input, 1 = Output Low Power Modes Block GPxDIR (latch) Peripheral 2 Input Peripheral 3 Input Peripheral 1 Output Peripheral 2 Output Peripheral 3 Output Peripheral 1 Output Enable Peripheral 2 Output Enable Peripheral 3 Output Enable 00 01 10 1 1 00 01 10 1[...]

  • Page 83

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 The 280x supports 34 GPIO pins. The GPIO control and data registers are mapped to Peripheral Frame 1 to enable 32-bit operations on the registers (along with 16-bit operat[...]

  • Page 84

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 4-16. F2808 GPIO MUX Table DEFAULT AT RESET GPAMUX1/2 (1) PRIMARY I/O PERIPHERAL PERIPHERAL PERIPHERAL REGISTER FUNCTION SELECTION 1 (2) SELECTION 2 SELECTION 3 BITS[...]

  • Page 85

    GPyCTRL Reg SYNC SYSCLKOUT Qualification Input Signal Qualified By 3 or 6 Samples GPIOx T ime between samples GPxQSEL Number of Samples TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 The user can select the type of inp[...]

  • Page 86

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 5 Device Support Texas Instruments (TI) offers an extensive line of development tools for the C28x™ generation of DSPs, including tools to evaluate the performance of th[...]

  • Page 87

    PREFIX TMS 320 F 28015 PZ TMX = Experimental Device TMP = Prototype Device TMS = Qualified Device DEVICE F AMIL Y 320 = TMS320 E DSP Family TECHNOLOGY P ACKAGE TYPE PZ = 100-Pin Low-Profile Quad Flatpack (LQFP) GGM = 100-Ball Ball Grid Array (BGA) ZGM = 100-Ball Lead-Free BGA F = Flash EEPROM (1.8-V Core/3.3-V I/O) C = ROM (1.8-V Core/3.3-V I/O) DE[...]

  • Page 88

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 5.2 Documentation Support Extensive documentation supports all of the TMS320™ DSP family generations of devices from product announcement through applications developmen[...]

  • Page 89

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 SPRU790 TMS320x280x, 2801x, 2804x Enhanced Quadrature Encoder Pulse (eQEP) Module Reference Guide describes the eQEP module, which is used for interfacing with a linear or[...]

  • Page 90

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Application Reports and Software Key Links Include: 1. C2000 Get Started - www.ti.com/c2000getstarted 2. C2000 Digital Motor Control Software Library - www.ti.com/c2000app[...]

  • Page 91

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 methods described in this report can improve the absolute accuracy of the ADC to levels better than 0.5%. This application report has an option to download an example prog[...]

  • Page 92

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com SPRM444 F2809 ZGM IBIS Model SPRM291 F2808 GGM IBIS Model SPRM292 F2808 PZ IBIS Model SPRM293 F2808 ZGM IBIS Model SPRM288 F2806 GGM IBIS Model SPRM289 F2806 PZ IBIS Model[...]

  • Page 93

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6 Electrical Specifications This section provides the absolute maximum ratings and the recommended operating conditions for the TMS320F280x DSPs. 6.1 Absolute Maximum Rati[...]

  • Page 94

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.2 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT Device supply voltage, I/O, V DDIO 3.14 3.3 3.47 V[...]

  • Page 95

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.4 Current Consumption Table 6-1. TMS320F2809, TMS320F2808 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT I DD I DDIO (1) I DD3VFL (2) I DDA18 (3) I DDA33 [...]

  • Page 96

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 6-2. TMS320F2806 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT I DD I DDIO (1) I DD3VFL (2) I DDA18 (3) I DDA33 (4) MODE TEST CONDITIONS TYP (5) MAX [...]

  • Page 97

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 6-3. TMS320F2802, TMS320F2801 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT I DD I DDIO (1) I DD3VFL (2) I DDA18 (3) I DDA33 (4) MODE TEST CONDITIONS[...]

  • Page 98

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 6-4. TMS320C2802, TMS320C2801 Current Consumption by Power-Supply Pins at 100-MHz SYSCLKOUT I DD I DDIO (1) I DDA18 (2) I DDA33 (3) MODE TEST CONDITIONS TYP (4) MAX [...]

  • Page 99

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.4.1 Reducing Current Consumption 280x devices have a richer peripheral mix compared to the 281x family. While the McBSP has been removed, the following new peripherals h[...]

  • Page 100

    0.0 50.0 100.0 150.0 200.0 250.0 10 20 30 40 50 60 70 80 90 100 SYSCLKOUT (MHz) Current (mA) IDD IDDA18 IDDIO IDD3VFL 3.3-V current 1.8-V current 0.0 100.0 200.0 300.0 400.0 500.0 600.0 10 20 30 40 50 60 70 80 90 100 SYSCLKOUT (MHz) Device Power (mW) T OT AL POWER TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C28[...]

  • Page 101

    Curr e nt V s SYSCLKO UT 0 20 40 60 80 10 0 12 0 14 0 16 0 18 0 20 0 10 2 0 3 0 40 5 0 6 0 70 8 0 9 0 10 SY SCLK OU T (MHz) C urre nt (mA) I DD I D D A 18 1. 8v curr ent I DD IO I DD 3VF L 3 .3v c urr ent D evice Po w er Vs S Y S C L K OUT 0.0 10 0 . 0 20 0 . 0 30 0 . 0 40 0 . 0 10 20 30 4 0 50 60 70 8 0 90 10 0 SY SCLK OU T (MHz) D ev i ce Power ([...]

  • Page 102

    EMU0 EMU1 TRST TMS TDI TDO T CK VDDIO DSP EMU0 EMU1 TRST TMS TDI TDO T CK T CK_RET 13 14 2 1 3 7 11 9 6inchesorless PD GND GND GND GND GND 5 4 6 8 10 12 JT AGHeader VDDIO TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009[...]

  • Page 103

    T ransmission Line 4.0 pF 1.85 pF Z0 = 50 Ω (Α ) T ester Pin Electronics Data Sheet T iming Reference Point Output Under T est 42 Ω 3.5 nH Device Pin (B) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.6 Timing P[...]

  • Page 104

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.6.3 Device Clock Table This section provides the timing requirements and switching characteristics for the various clock options available on the 280x DSPs. Table 6-6 an[...]

  • Page 105

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.7 Clock Requirements and Characteristics Table 6-8. Input Clock Frequency PARAMETER MIN TYP MAX UNIT Resonator (X1/X2) 20 35 Crystal (X1/X2) 20 35 f x Input clock freque[...]

  • Page 106

    C4 C3 XCLKOUT (B) XCLKIN (A) C5 C9 C10 C1 C8 C6 TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is intended t[...]

  • Page 107

    t w(RSL 1) t h(b oo t-mod e) (B ) V DD IO , V DD3 VFL V DD A2 , V D DA IO (3.3 V) XCLKIN X1/X2 XRS Boot-Mode Pins V DD , V DD 1A18 , V DD 2A18 (1.8 V) XCLKOUT I/O Pins (C) User-Code Dependent User-Code Dependent Boot-ROM Execution Starts Peripheral/GPIO Function Based on Boot Code GPIO Pins as Input OSCCLK/8 (A ) GPIO Pins as Input (State Depends o[...]

  • Page 108

    t h(b oo t-mod e) (A ) t w(RSL 2) XCLKIN X1/X2 XRS Boot-Mode Pins XCLKOUT I/O Pins Address/Data/ Control (Internal) Boot-ROM Execution Starts User-Code Execution Starts User-Code Dependent User-Code Execution Phase (Don’t Care) User-Code Dependent User-Code Execution Peripheral/GPIO Function User-Code Dependent GPIO Pins as Input (State Depends o[...]

  • Page 109

    OSCCLK SYSCLKOUT W rite to PLLCR OSCCLK * 2 (Current CPU Frequency) OSCCLK/2 (CPU Frequency While PLL is Stabilizing With the Desired Frequency . This Period (PLL Lock-up T ime, t p ) is 131 072 OSCCLK Cycles Long.) OSCCLK * 4 (Changed CPU Frequency) GPIO t r(GPO) t f(GPO) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 [...]

  • Page 110

    GPIO Signal 1 Sampling Window Output From Qualifier 1 1 111111111 0000000 000 SYSCLKOUT QUALPRD = 1 (SYSCLKOUT/2) (SYSCLKOUT cycle * 2 * QUALPRD) * 5 (C) ) (A) GPxQSELn = 1,0 (6 samples) Sampling Period determined by GPxCTRL[QUALPRD] (B) (D) t w(SP) t w(IQSW) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, T[...]

  • Page 111

    GPIOxn XCLKOUT t w(GPI) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.9.3 Sampling Window Width for Input Signals The following section summarizes the sampling window width for input signals for various input qualif[...]

  • Page 112

    W AKE INT (A) XCLKOUT Address/Data (internal) t d(W AKE− I DLE) t w(W AKE− INT) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.9.4 Low-Power Mode Wakeup Timing Table 6-16 shows the timing requirements, Table 6-17[...]

  • Page 113

    t w(W AKE-INT) t d(W AKE-ST BY) t d(IDL E− XCOL ) W ake−up Signal X1/X2 or X1 or XCLKIN XCLKOUT ST ANDBY Normal Execution ST ANDBY Flushing Pipeline (A) (B) (C) (D) (E) (F) Device Status TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – RE[...]

  • Page 114

    t d(IDL E− XCOL ) X1/X2 or XCLKIN XCLKOUT HAL T HAL T W ake-up Latency Flushing Pipeline t d(W AKE− HAL T) (A) (B) (C) (D) Device Status (E) (G) (F) PLL Lock-up T ime Normal Execution t w(W AKE-GPIO) t p GPIOn Oscillator Start-up T ime TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F[...]

  • Page 115

    PWM (B) TZ XCLKOUT (A) t w(TZ ) t d(T Z-PW M)H Z TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.10 Enhanced Control Peripherals 6.10.1 Enhanced Pulse Width Modulator (ePWM) Timing PWM refers to PWM outputs on ePWM1-6[...]

  • Page 116

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 6-25 shows the high-resolution PWM switching characteristics. Table 6-25. High-Resolution PWM Characteristics at SYSCLKOUT = (60–100 MHz) MIN TYP MAX UNIT Micro Ed[...]

  • Page 117

    ADCSOCAO or ADCSOCBO t w(AD CSOC AL ) XNMI , XINT1, XINT2 t w(INT) Interrupt V ector t d(INT ) Address bus (internal) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 6-30. External ADC Start-of-Conversion Switchin[...]

  • Page 118

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.10.4 I2C Electrical Specification and Timing Table 6-33. I2C Timing TEST CONDITIONS MIN MAX UNIT f SCL SCL clock frequency I2C clock module frequency is between 400 kHz [...]

  • Page 119

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 6-34. SPI Master Mode External Timing (Clock Phase = 0) (1) (2) (3) (4) (5) SPI WHEN (SPIBRR + 1) IS EVEN OR SPI WHEN (SPIBRR + 1) IS ODD AND SPIBRR = 0 OR 2 SPIBRR [...]

  • Page 120

    9 4 SPISOMI SPISIMO SPICLK (clock polarity = 1) SPICLK (clock polarity = 0) Master In Data Must Be V alid Master Out Data Is V alid 8 5 3 2 1 SPISTE (A) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com A. In the master m[...]

  • Page 121

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 Table 6-35. SPI Master Mode External Timing (Clock Phase = 1) (1) (2) (3) (4) (5) SPI WHEN (SPIBRR + 1) IS EVEN OR SPI WHEN (SPIBRR + 1) IS ODD AND SPIBRR = 0 OR 2 SPIBRR [...]

  • Page 122

    Data V alid 1 1 SPISOMI SPISIMO SPICLK (clock polarity = 1) SPICLK (clock polarity = 0) Master In Data Must Be V alid Master Out Data Is V alid 1 7 6 10 3 2 SPISTE (A) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com A. [...]

  • Page 123

    20 15 SPISIMO SPISOMI SPICLK (clock polarity = 1) SPICLK (clock polarity = 0) SPISIMO Data Must Be V alid SPISOMI Data Is V alid 19 16 14 13 12 SPISTE (A) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.10.6 SPI Slave[...]

  • Page 124

    Data V alid 22 SPISIMO SPISOMI SPICLK (clock polarity = 1) SPICLK (clock polarity = 0) SPISIMO Data Must Be V alid SPISOMI Data Is V alid 21 12 18 17 14 13 SPISTE (A) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Tabl[...]

  • Page 125

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 6.10.7 On-Chip Analog-to-Digital Converter Table 6-38. ADC Electrical Characteristics (over recommended operating conditions) (1) (2) PARAMETER MIN TYP MAX UNIT DC SPECIFI[...]

  • Page 126

    ADC Power Up Delay ADC Ready for Conversions PWDNBG PWDNREF PWDNADC Request for ADC Conversion t d(B GR) t d(PW D) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.10.7.1 ADC Power-Up Control Bit Timing Figure 6-24. AD[...]

  • Page 127

    ac R s ADCIN0 C p 10 pF R on 1 k Ω 1.64 pF C h Switch T ypical V alues of the Input Circuit Components: Switch Resistance (R on ): 1 k Ω Sampling Capacitor (C h ): 1.64 pF Parasitic Capacitance (C p ): 10 pF Source Resistance (R s ): 50 Ω 28x DSP Source Signal TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C[...]

  • Page 128

    Analog Input on Channel Ax or Bx ADC Clock Sample and Hold SH Pulse SMODE Bit t dsch x_n t dsch x_n+1 Sample n Sample n+1 Sample n+2 t SH ADC Event T rigger from ePWM or Other Sources t d(SH ) TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DEC[...]

  • Page 129

    Analog Input on Channel Ax Analog Input on Channel Bx ADC Clock Sample and Hold SH Pulse t SH t dsch A0_n t dsch B0_n t dsch B0_n +1 Sample n Sample n+1 Sample n+2 t dsch A0_n +1 t d(SH ) ADC Event T rigger from ePWM or Other Sources SMODE Bit TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS[...]

  • Page 130

    N + ( SINAD * 1.76 ) 6.02 TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 6.11 Detailed Descriptions Integral Nonlinearity Integral nonlinearity refers to the deviation of each individual code from a line drawn from zer[...]

  • Page 131

    + ƪ ǒ t a(fp) t c(SCO) Ǔ * 1 ƫ (round up to the next highest integer) or 0, whichever is larger (round up to the next highest integer) or 1, whichever is larger + ƪ ǒ t a(fr ) t c(SCO) Ǔ * 1 ƫ Flash Page Wait-State Flash Random Wait-State (round up to the next highest integer) or 1, whichever is larger + ƪ ǒ t a(O TP) t c(SCO) Ǔ * 1 ƫ O[...]

  • Page 132

    + ƪ ǒ t a(r p) t c(SCO) Ǔ * 1 ƫ (round up to the next highest integer) or 0, whichever is larger + ƪ ǒ t a(r r) t c(SCO) Ǔ * 1 ƫ (round up to the next highest integer) or 1, whichever is larger ROM Page Wait-State ROM Random Wait-State TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS[...]

  • Page 133

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 7 Migrating From F280x Devices to C280x Devices 7.1 Migration Issues The migration issues to be considered while migrating from the F280x devices to C280x devices are as f[...]

  • Page 134

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com 8 Revision History This data sheet revision history highlights the technical changes made to the SPRS230K device-specific data sheet to make it an SPRS230L revision. Scope[...]

  • Page 135

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 9 Mechanical Data Table 9-1 through Table 9-6 show the thermal data. The mechanical package diagram(s) that follow the tables reflect the most current released mechanical [...]

  • Page 136

    TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 SPRS230L – OCTOBER 2003 – REVISED DECEMBER 2009 www.ti.com Table 9-6. F2809 Thermal Model 100-pin PZ Results AIR FLOW PARAMETER 0 lfm 150 lfm 250 lfm 500 lfm θ JA [°C/W] High k PCB 44.02 28.34 36.28 33.68 Ψ JT [°C/W] 0.2 0.56 [...]

  • Page 137

    PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2010 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMS320C2801GGMA ACTIVE BGA MICROSTAR GGM 100 TBD Call TI Call TI TMS320C2801GGMS ACTIVE BGA MICROSTAR GGM 100 TBD Call[...]

  • Page 138

    PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2010 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMS320F28016PZQ ACTIVE LQFP PZ 100 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMS320F28016PZS ACTIVE LQFP PZ 100 90 Green [...]

  • Page 139

    PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2010 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMS320F2802ZGMA ACTIVE BGA MICROSTAR ZGM 100 184 Green (RoHS & no Sb/Br) SNAGCU Level-3-260C-168 HR TMS320F2802ZGMS ACTIVE BGA MICROSTAR[...]

  • Page 140

    PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2010 Addendum-Page 4 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMS320F2809PZA ACTIVE LQFP PZ 100 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMS320F2809PZQ ACTIVE LQFP PZ 100 1 Green (Ro[...]

  • Page 141

    MECHANICAL DA T A MPBG028B FEBRUAR Y 1997 – REVISED MA Y 2002 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 GGM (S–PBGA–N100) PLASTIC BALL GRID ARRA Y 0,08 0,10 1,40 MAX 0,85 0,55 0,45 0,45 0,35 0,95 4 C B A D E 2 13 K F G H J 57 6 9 81 0 Seating Plane SQ 9,90 10,10 7,20 TYP 0,40 0,40 A1 Corner Bottom View 4145257–3/C 12/01 0,80 0,80 NOT[...]

  • Page 142

    [...]

  • Page 143

    MECHANICAL DA T A MTQF013A – OCTOBER 1994 – REVISED DECEMBER 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PZ (S-PQFP-G100) PLASTIC QUAD FLA TP ACK 4040149 /B 1 1/96 50 26 0,13 NOM Gage Plane 0,25 0,45 0,75 0,05 MIN 0,27 51 25 75 1 12,00 TYP 0,17 76 100 SQ SQ 15,80 16,20 13,80 1,35 1,45 1,60 MAX 14,20 0 ° –7 ° Seating Plane 0,08 0,5[...]

  • Page 144

    IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders[...]