Renesas REJ06B0732-0100 manual

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Table of contents for the manual

  • Page 1

    APPLICATION NOTE REJ06B0732-0100/Rev.1.00 March 2008 Page 1 of 13 SH7211 Group Data Transfer between On-chip RAM Ar eas with DMAC (Cycle-Stealing Mode) Introduction This applicat ion note desc ribes the operation of the DMAC, and is inte nded for refe rence t o help in the d esign of user software. Target Device SH7211 Contents 1. Introduction ....[...]

  • Page 2

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 2 of 13 1. Introduction 1.1 Specification • DMAC cha nnel 0 is used. • Auto-request mode is used as the interrupt source for activating DMA transfer. • Cycle-stealing mode is use d as the bus m ode. 1.2 Used Module [...]

  • Page 3

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 3 of 13 2. Description of Sample Application In this sample application, the direct memory access contro ller (DMAC) is set to a uto request mode to t ransfer 512- Kbtyte data stored in the on-chip R AM to anothe r addres[...]

  • Page 4

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 4 of 13 DREQ Bus mastership returned to CPU once Bus cycle Write Read Write Read CPU CPU CPU DMAC DMAC DMAC DMAC CPU CPU In the normal mode of cycle stealing, bus mastership is given to another bus master after each DMA t[...]

  • Page 5

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 5 of 13 DMATCR_n SAR_n CHCR_n DAR_n DMAOR DMARS0 to DMARS3 HEIn DACK0 to DACK3, TEND0, TEND1 DEIn RDMATCR_n RSAR_n RDAR_n On-chip memory On-chip peripheral module DMA transfer request signal DMA transfer acknowledge signa[...]

  • Page 6

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 6 of 13 2.2 Operational Description of Sample Program The settings of the DMAC for the sample program are listed in table 4. Also, the operation of the sample program is illustrated in figure 4. Table 4 Settings of DM AC [...]

  • Page 7

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 7 of 13 2.3 Procedure for Setting Modules This section describes the procedure for making initial settings when the DMAC is to be used to transfer data between locations within the on-chip RAM. Auto request mode is used f[...]

  • Page 8

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 8 of 13 DMAC_init END [3] [4] [5] [6] [1] [2] [1] Disable DMA transfer Set the DE (DMA enable) bit to 0 Disable DMA transfer [2] Set the DMA transfer source address (SAR_0) Specify the DMA transfer source address [3] Set [...]

  • Page 9

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 9 of 13 2.4 Register Settings for Sample Program 2.4.1 Clock Pulse Generator (CPG) The settings of the clock pulse generator for the sample program are described in table 5. Table 5 Settings of Clock Pulse Generator Regis[...]

  • Page 10

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 10 of 13 2.4.3 Direct Memory Access Controller (DMAC) The settings of DMAC registers for the sa mple program are described in table 7. Table 7 Settings of DM AC Registers Register Name Address Setting Value Description DM[...]

  • Page 11

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 11 of 13 3. Documents for Reference • Software Manual SH-2A, SH2 A-FPU Softwa re Manual The most up-t o-date versi on of this document i s available o n the Renesa s Technology Website. • Hardware Manual SH7211 Group [...]

  • Page 12

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 12 of 13 Website and Support Renesas Technolo gy Website http://www.renesas.com/ Inquiries http://www.renesas.com/inquiry csc@renesas.com Revision Record Description Rev. Date Page Summary 1.00 Mar.21.08 — First edition[...]

  • Page 13

    SH7211 Group Data Transfer between On-chi p RA M Areas with DMAC (Cycle-Stealing M ode) REJ06B0732-0100/Rev.1.00 March 2008 Page 13 of 13 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to th[...]