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Intel AI5VG manual

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Table of contents for the manual

  • Page 1

    AI5VG Pentium VP3 Baby AT Motherboard User ’ s Manual Version 2.0[...]

  • Page 2

    [...]

  • Page 3

    Contents AI5VG Pe ntium VP3 Baby AT Motherboar d User’ s Manual i Contents Chapter 1 Introduction .................................................... 1 Chapter 2 Specifications .................................................. 2 Chapter 3 Hardware Description ................................... 4 3.1 Processor and CPU Voltage ..................[...]

  • Page 4

    Contents ii AI5VG Pe ntium VP3 Baby AT Motherboar d User’ s Manual Chapter 6 BIOS Configuration ..................................... 29 6.1 BIOS I ntroduction ...........................................................32 6.2 BIOS Setup ......................................................................32 6.3 Standard CMOS Setup...............[...]

  • Page 5

    Chapter 1 I ntroduction AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 1 Chapter 1 Introduction This manual is designed to give y ou inform ation on the AI5VG Motherboard. It is divided into the following six sections: • • • • In troduction • • • • Specifications • • • • Hardware Description • • • • Hardwar[...]

  • Page 6

    Chapt er 2 Specificati o ns 2 AI5VG Pentium VP3 Baby AT Motherboard U ser’ s Manual Chapter 2 Specifications Based on VIA’s VP3AT chipset, the AI5VG is a Baby AT Pentium mot herboard that s upports al l the f eatures to m ak e a Micros oft PC’97 compliant PCI/ISA sy stem . This high performance m odel comes w ith an Accelerated Graphics Port [...]

  • Page 7

    Chapt er 2 Specificati o ns AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 3 Onboard Bus Mastering EIDE Two EIDE interf aces for u p to four devices , support PIO Mode 3/4 or Ultra DMA/33 IDE Hard Disk and ATAPI CD-R OM. BIOS Licensed BIOS with additional features: • FLAS H EEPROM (128KB) f or BIOS updat e • IS A P lug and P lay (PnP [...]

  • Page 8

    Chapter 3 Hardware Description 4 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual Chapter 3 Hardware Description This chapter briefly describes each of the major features of the AI5VG mot herboard. The lay out of the board is show n in Figu re 1 w hich show s the locations of the key com ponents. The topics covered in this chapter are as foll[...]

  • Page 9

    Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5 Figure 1: Layout of the AI5VG Motherboard[...]

  • Page 10

    Chapter 3 Hardware Description 6 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual 3.1 Processor and CPU Voltage The AI5VG is designed to take a Pentium Processor with a bus speed o f 60 and 66 MHz. The internal clock of the CPU can be multiples of 1.5, 2, 2.5, 3, 3.5, 4 an d 4.5 of the bu s clock, the CPU f requency can be 90 to 300MHz. The o[...]

  • Page 11

    Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 7 (1) 72-pin SIMM (5V) EDO DRAM Bank 0 (S I MM1, SI MM2) Bank 1 (S I MM3, SI MM4) Total M em ory 4MB × 2 ----- 8MB 8MB × 2 ----- 16 MB 16MB × 2 ----- 3 2MB 32MB × 2 ----- 6 4MB 64MB × 2 ----- 128MB 4MB × 2 4MB × 2 16MB 8MB × 2 4MB × 2 24MB 16MB × 2 4MB[...]

  • Page 12

    Chapter 3 Hardware Description 8 AI5VG Pentium VP3 Baby AT Motherboard U ser’s Manual (2) 168-pin DI MM (3.3V) SDRAM or EDO DRAM Bank 0 (DIMM 2 ) Bank 1 (DIMM 1 ) Total M emory 8MB ----- 8MB 16 MB ----- 1 6MB 32 MB ----- 3 2MB 64 MB ----- 6 4MB 128MB ----- 128MB 8MB 8MB 16MB 16MB 8MB 24MB 32MB 8MB 40MB 64MB 8MB 72MB 128MB 8MB 136MB 16MB 16MB 32MB[...]

  • Page 13

    Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 9 3. Power M anagement The power management fea ture pr ovides p ower savings by slowing do w n the CPU clock, turn ing off the m onitor screen an d stopping th e HDD spindle motor. 3.5 Onboard PCI EIDE The PCI EIDE controller i s part of t he VP3AT chi pset. It[...]

  • Page 14

    Chapter 3 Hardware Description 10 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 3.8 I/O Port Address Map Each peripheral devi ce in the sy stem is assi gned a set of I/O port addresses wh ich also becomes the identity of the device. There are a total of 1K port address s pace available. The follow ing table lists the I/O port addresses u[...]

  • Page 15

    Chapter 3 Hardware Description AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 11 3.10 Interrupt Request Lines (IRQ) There are a total of 15 IRQ lines available on the m otherboard. P eripheral devices use interru pt request lines to notify the CPU f or the service required. The follow ing table sh ows the IRQ us ed by th e devices on th e[...]

  • Page 16

    Chapter 4 Hardware Se ttings 12 AI5VG Pe ntium VP3 Baby AT Mother board Use r’s Manual Chapter 4 Hardware Settings The follow ing s ections describe th e necessary procedures and proper jumper setting s to configure th e AI5VG motherboard. 4.1 SW1(1-8): CPU Frequen cy Selector ......................................... 14 4.2 SW2(1-4): CPU Voltage[...]

  • Page 17

    Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 13 Figure 2: Jumper Locations of the AI5VG[...]

  • Page 18

    Chapter 4 Hardware Se ttings 14 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 4.1 SW1(1-8): CPU Frequency Selector For I ntel Pentium CPU SW1 Bus C lock Mutiplier CPU FREQ. o n o ff o ff o ff o ff o ff o ff o ff 60MHz 1.5x P54C-90 o ff off o ff o ff o ff o ff o ff o ff 66MHz 1.5x P54C-100 o n o ff o ff o ff o n off o ff o ff 60MHz 2x P54[...]

  • Page 19

    Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 15 For Cyrix 6x86, 6x86L CPU SW1 Bus Cloc k Mutiplier CPU FREQ . o n o ff o ff o ff o n off o ff o ff 60MHz 2x P150+ (120MHz) o ff off o ff o ff o n o ff o ff o ff 66MHz 2x P166+ (133MHz) For Cyrix 6x86MX CPU SW1 Bus Cloc k Mutiplier CPU FREQ . o ff off o ff o ff [...]

  • Page 20

    Chapter 4 Hardware Se ttings 16 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual SW1 Bus Cloc k Mutiplier CPU FREQ . o ff off o ff o ff o n o n o ff o ff 66MHz 2.5x PR166 / K6-166 o ff off o ff o ff o ff o n o ff o ff 66MHz 3x K6-200 o ff off o ff o ff o ff o ff o ff o ff 66MHz 3.5x K6-233 4.2 SW2(1-4): CPU Voltage Selector For Single Volta[...]

  • Page 21

    Chapter 4 Hardware Se ttings AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 17 For Dual V oltage CPU: Intel P55C, Cy rix 6x86L/MX, AMD K6 SW2 V IO V CORE CPU o ff off o n o n 3.3V 3.2V K6- 233 (0.35 µ ) on on off on 3.3V 3.1V o ff on o ff o n 3.3V 3.0V o n o ff o ff o n 3.3V 2.9V K6-166/ 200 6x86MX o ff off o ff o n 3.3V 2.8V P55C 6x86L [...]

  • Page 22

    Chapter 4 Hardware Se ttings 18 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual For Dual V oltage CPU: Intel P55C, Cy rix 6x86L/MX, AMD K6 SW2 V IO V CORE CPU o ff on o ff o ff 3.3V 2.2V K6- 233 (0.25 µ ) o n o ff o ff o ff 3.3V 2.1V K6- 233 (0.25 µ ) o ff off o ff o ff 3.3V 2.0V 4.3 JP5: Clear CMOS Selection Use JP5, a 3-pin header, to [...]

  • Page 23

    Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 19 Chapter 5 Installation This chapter describes th e connectors an d interfaces that the A I5VG provides for creatin g a w orking s ystem . Ref er to Figure 3 for th e location of the con nectors. The following items are covered in this chapter: 5.1 I/O Connectors ...[...]

  • Page 24

    Chapter 5 I nstallation 20 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Figure 3: Connector Location on the AI5VG[...]

  • Page 25

    Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 21 5.1 I/O Connectors The I/O con nectors conn ect th e AI5VG to the m os t com m on peripherals . To attach cables to these con nectors, carefu lly align Pin 1 of the cables to that of the connectors. Refer to Fig ure 4 for the location and orientation of the con nect[...]

  • Page 26

    Chapter 5 I nstallation 22 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.3 J2: ATX Pow er Supply Connector J2 is a 20- pin A TX power s u ppl y conn ect or. R ef e r to t h e f ol low ing table for the pin out assign ments. Signal Nam e Pin # Pin # Signal N ame 3.3V 11 1 3.3V -12V 12 2 3.3V Groun d 13 3 Groun d PS-O N 14 4 +5V Groun d [...]

  • Page 27

    Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 23 5.5 J7, J6: Serial Ports The onboard serial ports of the AI5VG are 10 pin -header conn ectors. J7 is COM1 and J6 is COM2 . T he following table shows the pin out of the these conn ectors. Pin # Signal Nam e 1 DCD, Data carrier detect 2 RXD, Receive data 3 TXD, T ran[...]

  • Page 28

    Chapter 5 I nstallation 24 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.7 J9, J11: EIDE Connectors J9: Prim ary IDE C onnector Signal Nam e Pin # Pin # Signal N ame Reset IDE 1 2 Ground Host data 7 3 4 H ost data 8 Host data 6 5 6 H ost data 9 Host data 5 7 8 Host data 10 Host data 4 9 10 Host data 11 Host data 3 11 12 Host data 12 Ho[...]

  • Page 29

    Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 25 5.8 J10: Parallel Port Connector The f ollowing table de scribe s the pin out ass ignm ents of this connec tor. Signal Nam e Pin # Pin # Signal Nam e Lin e printer s trobe 1 14 AutoF eed PD0, parallel dat a 0 2 15 Error PD1, parallel d ata 1 3 16 Initialize PD2, par[...]

  • Page 30

    Chapter 5 I nstallation 26 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 5.11 J13 Wake on LAN Connector J13is a 3-pi n header f or Wake on L AN f unc tion on t he m otherboard. Pin # Signal Nam e 1 5VSB 2 Gr ound 1 2 3 3 Wa ke on L AN 5.12 J14: CPU Fan P ower Connector J14 is a 3-pin header f or the CPU fan pow er conn ector. The fan m u[...]

  • Page 31

    Chapter 5 I nstallation AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 27 Speak er: Pins 1 - 4 This connector prov ides an interf ace to a speaker for au dio tone ge neratio n. An 8-ohm spea ke r is rec omm ende d. J20 Pin # Sign al Nam e 1 Speaker ou t 2 No connect 3 Groun d 4 +5V Power LED and Keylock: Pin s 11 - 15 The power L ED indic[...]

  • Page 32

    Chapter 5 I nstallation 28 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Reset Switch: Pins 9 and 19 The reset switch allow s the us er to reset the system w ithout turning the main pow er sw itch Off an d then On. Orientation is not required wh en m aking a conn ection to this header. Hard Disk Drive LE D Connector: Pin s 10 and 20 This[...]

  • Page 33

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 29 Chapter 6 BIOS Configuration This chapter describes the different settings av ailable in the Aw ard BIOS that comes w ith the AI5VG motherboard. The top ics covered in this chapter are as follow s: 6.1 BIOS Introduction .........................................[...]

  • Page 34

    Chapter 7 LANDesk User Guide 30 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Cache Rd+CPU Wt Pipeline Read Arou nd Write Cache Timi ng Video BIOS Cacheable Syst em BIOS Cacheable Memory Hole at 15MB Addr. AGP Aperture Size OnChip USB 6.6 Power Man agem ent Setup ......................................................... 42 Po wer M anage[...]

  • Page 35

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 31 IDE Primary /Secondary Mas ter/Slave PIO IDE Primary /Secondary Mas ter/Slave UDMA Onboard FDD Con troller Onboard Serial/Parallel P o rt UAR T 2 Mode Onboard Paralle l Mode 6.11 Supervisor / Us er Passw ord..................................................... [...]

  • Page 36

    Chapter 7 LANDesk User Guide 32 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.1 BIOS Introduction The Award BIOS (Basic Input/Output System ) installed in y our compu ter sy stem ’s R OM supports Intel/C yrix /AMD processors in a standard IBM-A T compatible I/O sy stem . The BIOS provides critical low -leve l su pport for stan dard d[...]

  • Page 37

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 33 ROM PCI/ISA BIOS CMO S SETUP UTILITY AW ARD SOF T W A RE , INC. STA NDA RD CMOS SE TUP INTEGRATED PERIPHERAL S BIOS FEATURES SETU P SUPER VISOR PASSWORD CHIPSET FEATUR ES SETUP USER PASSWORD POW ER MANAGE MENT SETUP I DE HDD AUTO DET E CT I ON PNP/P CI CONFIGUR[...]

  • Page 38

    Chapter 7 LANDesk User Guide 34 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.3 Standard CMOS Setup “ Standard CMOS Setup ” choice allows y o u to record some basic hardw are config urations in your com puter sy stem and set th e sys tem clock and error h andling. If the moth erboard is already in stalled in a workin g sy stem , y [...]

  • Page 39

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 35 Time The time form at is: Hou r : 00 to 23 M in ute : 00 to 59 Second : 00 to 59 To set the tim e, high light the “ Ti m e ” fi eld and us e the <PgUp>/ <PgDn > or +/- key s to set the current tim e. Prim ary HDDs / Seconda ry HDDs The onboard P[...]

  • Page 40

    Chapter 7 LANDesk User Guide 36 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual NOTE: The specification s of your drive must match with the d rive table. The h ard disk will n ot work properly if you enter incorrect informat ion in thes e fields. If your hard dis k drive type i s not matched or li sted, you can use T ype User t o define yo[...]

  • Page 41

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 37 6.4 BIOS Features Setup This section allow s you to configure and im prove y our system and allows you to set up som e sy stem features accordin g to you r preference. ROM / PCI ISA BIOS BIOS FEAT URES SETUP AW ARD SOFTW ARE, INC. Virus W arning : Disabled Vide[...]

  • Page 42

    Chapter 7 LANDesk User Guide 38 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual Quick Power On Self Test This choice speeds up th e Power On Self Test (P OST) after you power up the system . If it is set to Enabled , BIOS w ill skip some item s. By defau lt, this choice is En abled . Boot Sequence This field determ ines the driv e that the[...]

  • Page 43

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 39 Typem atic Rate Setting When disabled, continually holding down a key on y our key board w ill generate only one instance. When enabled, you can set the tw o ty pematic controls listed next. By default, th is field is set to Dis abled. Typem atic Rate (Chars/Se[...]

  • Page 44

    Chapter 7 LANDesk User Guide 40 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.5 Chipset Features Setup This Setup menu controls the configuration of the motherboard chipset. ROM PCI/ISA BIOS CHIPSET FEAT URES SETUP AW ARD SOFTW ARE INC. Bank 0/1 DRAM Timing : 60ns OnChip USB : Disabled Bank 2/3 DRAM Timing : 60ns Bank 4/5 DRAM Timing :[...]

  • Page 45

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 41 Cache Tim ing This field sets th e tim ing of the cach e in the s y stem . The options are Fas t and Fastes t . By default, this f ield is set to Fast . Video BIOS Cacheable When en abled, access to video BIOS addressed at C0000H to C 7FFFH are cached, provided[...]

  • Page 46

    Chapter 7 LANDesk User Guide 42 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.6 Pow er Management Setup The Power Manage m ent Setup allo ws y ou to save energy of your sy stem effectively . It w ill shut down the hard disk an d turn off video display after a period of inactivity. ROM PCI/ISA BIOS (2 A59IM29) POW ER MANAGEME NT SETUP A[...]

  • Page 47

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 43 PM Co ntrol by APM Thi s field a llows you to use t he Advanc ed P ower M anagement d evice to enhance the Max . Power Sav ing m ode and stop th e CPU’s intern al clock. If the Max. Pow er Saving is n ot enabled, this will be preset to NO. Video Off Method Th[...]

  • Page 48

    Chapter 7 LANDesk User Guide 44 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual PM Events The VGA, LPT & COM, HDD & FDD, DMA /m aster, Modem Ring Resum e, R TC Alarm R esum e and Primary INTR section are I/O even ts w hich can preven t the s yst em f rom enterin g a pow er savin g m ode or can aw aken th e s y stem from such a m od[...]

  • Page 49

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 45 6.7 PNP/P CI Configuration This o ption configure s the PCI bus system. All PCI bus systems on the system use INT#, thus all installed PCI cards m ust be set to this value. ROM PCI/ISA BIOS CHIPSET FEAT URES SETUP AW ARD SOFTW ARE INC. PNP OS Installed : No CPU[...]

  • Page 50

    Chapter 7 LANDesk User Guide 46 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual CPU to PCI Write Buffer When enabled, th is option increase th e efficien cy of the PCI bus to and speed up the execution in the processor. By default, this field is set to Enabled . PCI Dynam ic Bursting When enabled, th is option com bines several PCI cycles [...]

  • Page 51

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 47 PCI IDE IRQ M ap To This field allows y ou to config ure the ty pe of IDE disk co nt roller in your system . The default setup is ISA . If you have equipp ed with PCI controller, you need to specify which s lot has the con troller and PCI interrupt is as sociat[...]

  • Page 52

    Chapter 7 LANDesk User Guide 48 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.8 Load BIOS Def aults This optio n allow s y ou to load the troubleshooting default v alues perman ently stored in the BIOS ROM. These default setting s are non-optim al and disable all high- perform ance featu res. ROM PCI/ISA BIOS CMO S SETUP UTILITY AW ARD[...]

  • Page 53

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 49 6.10 Integrated Peripherals Thi s o ption se ts your hard disk co nfi gur ation, m od e and po rt. ROM PCI/ISA BIOS CHIPSET FEAT URES SETUP AW ARD SOFTW ARE INC. OnChip IDE First Channel : Enabled Onboard Parallel Mode : SPP OnChip IDE Second Channel : Enabled [...]

  • Page 54

    Chapter 7 LANDesk User Guide 50 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual The sy stem supports fiv e m odes, nu mbered f rom 0 (default ) to 4, w hich primarily differ in tim ing. When A uto is selected, the BIOS w ill select the best avail able m ode. IDE Prim ary/Secondary Master/Slave UDM A Thi s field all ows y our system to i m [...]

  • Page 55

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 51 6.11 Supervisor / User Passw ord These tw o options set th e sy stem passw ord. Supervis or Passw ord sets a password that w ill be used to pr otect the system and Setup utility . User Passwo rd sets a passw ord that will be used exclusiv ely on the sy stem. To[...]

  • Page 56

    Chapter 7 LANDesk User Guide 52 AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 6.12 IDE HDD Auto Detection This option detects th e paramet ers of an IDE hard di sk dri ve, an d automatically enters them into the Stan dard CMOS Setup screen. ROM PCI/ISA BIOS STANDARD CMOS SETUP AW ARD SOFTW ARE, INC. HARD DISKS TYPE SIZE CYLS HEAD PRECOMP[...]

  • Page 57

    Chapter 7 LANDesk User Guide AI5VG Pe ntium VP3 Baby AT Mother board User ’s Manual 53 6.14 Save & Exit Setup This option allow s y ou to determ ine w heth er to accept the m odifications or not. If you ty pe “Y”, you w ill quit the setup utility and save all changes into the CMOS m emory . If you ty pe “ N”, you w ill return to Setup[...]