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Inova ICP-PII manual

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Table of contents for the manual

  • Page 1

    CompactPCI ® ICP-PIII High-Performance CPU Boards USER’S MANUAL Publication Number: PD00581013.004 AB MAN-ICP-PIII[...]

  • Page 2

    This user’ s manual describes a product that, due to its nature, cannot describe a particular applica- tion. The content of this user’ s manual is furnished for informational use only , is subject to change without notice, and should not be constructed as a commitment by Inova Computers GmbH . Inova Computers GmbH assumes no responsibility or l[...]

  • Page 3

    ©2002 Inova Computers GmbH Page 0-1 Doc. PD00581013.004 ICP-PIII Preface CompactPCI ® Preface Contents Unpacking and Special Handling Instruc- tions ............................................... 6 Revision History ............................... 7 Three Y ear Limited W arranty .............. 8 1.0 ICP-PIII CPU ........................... 1-2 1.[...]

  • Page 4

    ©2002 Inova Computers GmbH Page 0-2 Doc. PD00581013.004 Preface ICP-PIII 1.4 Hardware ............................. 1-10 1.41 Block Diagram ........................................................................................ 1-10 Figure 1.41 Block Diagram .........................................................................................[...]

  • Page 5

    ©2002 Inova Computers GmbH Page 0-3 Doc. PD00581013.004 ICP-PIII Preface CompactPCI ® 3.1 CompactPCI Backplane .......... 3-10 Figure 3.10 Inova’ s 32-Bit CompactPCI 8-Slot Backplane - RH System Slot ................................ 3-11 3.2 Interfaces ............................. 3-12 3.21 J7 & J12 Fast Ethernet ..........................[...]

  • Page 6

    ©2002 Inova Computers GmbH Page 0-4 Doc. PD00581013.004 Preface ICP-PIII A1 IPB-FPE8 CPU Extension ......... A-2 A1.1 J11 Interface for COM1, Mouse & Keyboard ............................................ A-2 A1.2 IPB-FPE8 & Front-panel (4HP or 8HP) ....................................................... A-2 Figure A1.2 IPB-FPE8 Stand-Alone[...]

  • Page 7

    ©2002 Inova Computers GmbH Page 0-5 Doc. PD00581013.004 ICP-PIII Preface CompactPCI ® B1 IPM-A T A CPU Extension ........... B-2 B1.1 J1 Interfaces ............................................................................................. B-2 Figure B1.1a Dedicated IPM-A T A Backplane ...........................................................[...]

  • Page 8

    ©2002 Inova Computers GmbH Page 0-6 Doc. PD00581013.004 Preface ICP-PIII Unpacking and Special Handling Instructions This product has been designed for a long and fault-free life; nonetheless, its life expectancy can be severely reduced by improper treatment during unpacking and installation. Observe standard antistatic precautions when changing p[...]

  • Page 9

    ©2002 Inova Computers GmbH Page 0-7 Doc. PD00581013.004 ICP-PIII Preface CompactPCI ® Revision History Manual MAN-ICP-PIII Publication Number PD00581013.XXX Issue Author Date of Issue PD00581013.001 AB 31/11/2000 PD00581013.002 AB 15/08/2001 PD00581013.003 AB 21/09/2001 PD00581013.004 AB 15/02/2002 Specs. Updated & Rear I/O Table Corrected Fi[...]

  • Page 10

    ©2002 Inova Computers GmbH Page 0-8 Doc. PD00581013.004 Preface ICP-PIII Three Y ear Limited W arranty Inova Computers (‘ Inova ’) grant the original pur chaser of Inova products the following hardware warranty . No other warranties that may be granted or implied by anyone on behalf of Inova are valid unless the consumer has the expressed writ[...]

  • Page 11

    ©2002 Inova Computers GmbH Page 1-1 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 Product Overview Overview Contents 1.0 ICP-PIII CPU ........................... 1-2 1.01 Interfacing ............................................................................................... 1-3 1.02 Peripherals .................................[...]

  • Page 12

    ©2002 Inova Computers GmbH Page 1-2 Doc. PD00581013.004 Product Overview ICP-PIII 1.0 ICP-PIII CPU The ICP-PIII is a high-performance 3U CompactPCI single-board Socket 370 based universal CPU that satisfies the needs of a wide range of industrial automation, military , medical, aerospace, imaging, telecommunications, process control and embedded/O[...]

  • Page 13

    ©2002 Inova Computers GmbH Page 1-3 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 1.01 Interfacing For maximum communication flexibility , multiple interfaces satisfying different industrial stand- ards are implemented. LAN applications can take advantage of Inova’ s 10BaseT/100BaseTx (dual) Ethernet implementation or , if high-s[...]

  • Page 14

    ©2002 Inova Computers GmbH Page 1-4 Doc. PD00581013.004 Product Overview ICP-PIII 1.1 Specifications Processor Socket 370 BGA (mobile) or FC-PGA based Intel Pentium III or Celeron Pentium III Up to 1000MHz (100MHz PSB, 256kByte L2 cache) Mobile PIII Up to 700MHz BGA2 package with interposer (100MHz PSB, 256kByte L2 cache) Mobile Celeron BGA2 packa[...]

  • Page 15

    ©2002 Inova Computers GmbH Page 1-5 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 PCI/PCI Intel 21150 transparent bridge (Master) or Intel 21554 non-transpar- ent PCI/PCI bridge for multiprocessing (Slave) operation with Basic Hot-Swap support (PICMG 2.1 R1.0), Serialized interrupts and univer- sal (3.3/5.0V) V I/O support On-Board[...]

  • Page 16

    ©2002 Inova Computers GmbH Page 1-6 Doc. PD00581013.004 Product Overview ICP-PIII 1.2 Configuration Inova’ s high-performance, high-density 3U PIII board supports functionality and connectivity on all three major serial networking levels like Fast Ethernet, FireW ire and USB as well as most state-of- the-art fieldbus standards such as PROFIBUS, [...]

  • Page 17

    ©2002 Inova Computers GmbH Page 1-7 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 100/10Mbit Ethernet FLASH Extension: Up to 512MByte TFT , GigaST ) R, PanelLink or L VDS North-Bridge Optional Multiprocessing Socket 370 or BGA2 based Intel Pentium III or Celeron Inova’ s CPUs have been prepared for rear I/O operation. Currently ([...]

  • Page 18

    ©2002 Inova Computers GmbH Page 1-8 Doc. PD00581013.004 Product Overview ICP-PIII 1.3 Software 1.31 Linux Being a modern operating system, Linux executes a 32-bit architecture, uses pre-emptive multi- tasking, has protected memory , supports multiple users, and has rich support for networking, including TCP/IP . Linux was originally written for In[...]

  • Page 19

    ©2002 Inova Computers GmbH Page 1-9 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 1.34 Windows CE Microsoft® W indows CE is an operating system designed for a wide variety of embedded systems and products, from hand-held PCs and consumer electronic devices to specialized industrial con- trollers and embedded communications devices[...]

  • Page 20

    ©2002 Inova Computers GmbH Page 1-10 Doc. PD00581013.004 Product Overview ICP-PIII 1.4 Hardware 1.41 Block Diagram Figure 1.41 Block Diagram This block diagram is applicable to all Inova’ s PIII-based CPUs. Components and/or functionality may change without notice. An extra PCI load can be attached to the on-board 80-pin header . An open specifi[...]

  • Page 21

    ©2002 Inova Computers GmbH Page 1-11 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 1.42 Connector Location Figure 1.42 Connector Locations 1.43 Connector Description T able 1.43 Connector Description KEY CPCI-CONNECTOR PENTIUM III J14 J4 J3 J6 J7 J15 J17 J13 J11 J16 J18 J10 J9 J19 J20 J1 J2 Connector Description J1, J2 CompactPCI I[...]

  • Page 22

    ©2002 Inova Computers GmbH Page 1-12 Doc. PD00581013.004 Product Overview ICP-PIII T able 1.43 Continued 1.44 Front-Panel Features T able 1.44 Front Panels 1) The physical COM2 interface is missing on Inova’ s IPB-FPE8 piggyback allowing a PCI piggyback device to be installed. 2) If this piggyback is installed the hard-disk (IDE FLASH) must be i[...]

  • Page 23

    ©2002 Inova Computers GmbH Page 1-13 Doc. PD00581013.004 ICP-PIII Product Overview CompactPCI ® 1 Figure 1.44 Front-Panel Options The front-panels shown in Figure 1.44 show the tremendous flexibility built into Inova’ s CPU concept. From left, the standard CPU is 4TE with Ethernet, FireW ire, USB and VGA graphic con- nections. If, instead of VG[...]

  • Page 24

    ©2002 Inova Computers GmbH Page 1-14 Doc. PD00581013.004 Product Overview ICP-PIII 1.45 Interface Positions Figure 1.45 Interfaces Figure 1.45 shows the typical positioning of the front panel extension modules for mouse, key- board, COM1, COM2, LPT1 and COM2/Fieldbus interfaces. Note A hard disk, if installed, will generally be fitted to the piggy[...]

  • Page 25

    ©2002 Inova Computers GmbH Page 2-1 Doc. PD00581013.004 ICP-PIII Configuration CompactPCI ® 2 Configuration Configuration Con- tents 2.0 Memory Map ........................... 2-2 Figure 2.00 System Ar chitecture ................................................................................................ . 2-2 T able 2.00 UMB Reser vations fo[...]

  • Page 26

    ©2002 Inova Computers GmbH Page 2-2 Doc. PD00581013.004 Configuration ICP-PIII 2.0 Memory Map Figure 2.00 System Architectur e The UMB reservation may be set up with the BIOS Upper Memory Blocks (UMBs) 640 kByte Conventional Memory Extended Memory (Above 1 MByte) BIOS 128 kByte Free 48 kByte VGA BIOS CGA Screen Memory MDA Screen Memory VGA Screen [...]

  • Page 27

    ©2002 Inova Computers GmbH Page 2-3 Doc. PD00581013.004 ICP-PIII Configuration CompactPCI ® 2 T able 2.00 UMB Reser vations for ISA Start Address Finish Address 0CC00h 0CFFFh 0D000h 0D3FFh 0D400h 0D7FFh 0D800h 0DBFFh 0DC00h 0DFFFh UMB Reservations for ISA T able 2.01 Port Addressing Port Address COM1 3F8h COM2 2F8h LPT1 378h Port Addressing[...]

  • Page 28

    ©2002 Inova Computers GmbH Page 2-4 Doc. PD00581013.004 Configuration ICP-PIII 2.1 I/O Mapped Peripherals The original PC-XT and PC-A T desktop computer (ISA bus) specification allows for 10-bit I/O addressed peripherals. This permits peripheral boards to be I/O mapped from 0h to 3FFh. CompactPCI systems permit the full 16-bit addressing capabilit[...]

  • Page 29

    ©2002 Inova Computers GmbH Page 2-5 Doc. PD00581013.004 ICP-PIII Configuration CompactPCI ® 2 2.2 Memory Mapped Peripherals PC-A T desktop computers (ISA bus) allow 24-bit memory addressed peripherals. This decoding permits peripheral boards to be mapped in the Intel 80x86 memory map from 0h to 0FFFFFFh. Inova’ s CompactPCI systems allow the fu[...]

  • Page 30

    ©2002 Inova Computers GmbH Page 2-6 Doc. PD00581013.004 Configuration ICP-PIII Interrupt Request Interrupt Vector Function/Assignment IRQ0 0 8 h Timer IRQ1 0 9 h Keyboard IRQ2 0 A h Slave 8259 IRQ3 1) 0 B h COM 2/4 IRQ4 1) 0 C h COM 1/3 IRQ5 1) 0Dh LPT2 IRQ6 0 E h Floppy IRQ7 1) 0Fh LPT1 IRQ8 7 0 h Real-Time Clock IRQ9 1) 7 1 h Redirected IRQ2 IRQ[...]

  • Page 31

    ©2002 Inova Computers GmbH Page 2-7 Doc. PD00581013.004 ICP-PIII Configuration CompactPCI ® 2 2.4 Inova PIII Device List T able 2.40 shows the available PCI devices both on-board and off-board (CompactPCI backplane). It should be noted that the interrupt routing assumes a standard Inova backplane configuration with a right-hand system slot. T abl[...]

  • Page 32

    ©2002 Inova Computers GmbH Page 2-8 Doc. PD00581013.004 Configuration ICP-PIII T able 2.50 CompactPCI Bus Interrupts 2.5 Interrupt Configuration The CompactPCI specification defines a total of six interrupt signals on the backplane. INT A# through INTD# are used to route interrupts from the CompactPCI boards to the PIC on the ‘proc- essor board.[...]

  • Page 33

    ©2002 Inova Computers GmbH Page 2-9 Doc. PD00581013.004 ICP-PIII Configuration CompactPCI ® 2 2.6 T imer / Counter The IBM-compatible architecture configur es the programmable timer / counter (Intel 8254-com- patible) devices for system-specific functions as shown in T able 2.50. The BIOS programs T imer 0 to generate an interrupt approximately e[...]

  • Page 34

    ©2002 Inova Computers GmbH Page 2-10 Doc. PD00581013.004 Configuration ICP-PIII This page has been left blank intentionally .[...]

  • Page 35

    ©2002 Inova Computers GmbH Page 3-1 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 Interfaces Interfaces Contents 3.0 CompactPCI J1/J2 Connector ... 3-3 3.01 CompactPCI Connector ........................................................................... 3-3 Figure 3.01 The 32-Bit CompactPCI Bus Interface Connector .......................[...]

  • Page 36

    ©2002 Inova Computers GmbH Page 3-2 Doc. PD00581013.004 Interfaces ICP-PIII 3.29 J14 FLASH Interface ................................................................................ 3-19 3.30 J18 Floppy Disk Interface ........................................................................ 3-19 3.31 Connecting the PIII to the Inova IPB-FPE8 ......[...]

  • Page 37

    ©2002 Inova Computers GmbH Page 3-3 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.0 CompactPCI J1/J2 Connector The CompactPCI standard is electrically identical to the PCI local bus standard but has been en- hanced to support rugged industrial environments and up to 8 slots. The standard is based upon a 3U board size and uses a rugged [...]

  • Page 38

    ©2002 Inova Computers GmbH Page 3-4 Doc. PD00581013.004 Interfaces ICP-PIII T able 3.02 Inova’ s ICP-PIII 32-Bit CompactPCI J1 Pin Assignment 1) Reserved for use for Inova’ s Uninterruptible Power Supply (UPS) Pin Nr Row A Row B Row C Row D Row E J1-25 +5 V REQ64# Pull- U p V ( I / O ) ENUM# +3.3V +5V J1-24 AD[1] + 5 V V( I / O ) AD[0] ACK64# [...]

  • Page 39

    ©2002 Inova Computers GmbH Page 3-5 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 T able 3.03 Inova’ s ICP-PIII 32-Bit CompactPCI J2 Pin Assignment (Standard) 4) : 5V open collector signal (5V/100mA) 5) : Option “External Battery” (Note: battery must be removed from CPU board) U bat = +3.4V to +3.6V Pin Nr Row A Row B Row C Row D R[...]

  • Page 40

    ©2002 Inova Computers GmbH Page 3-6 Doc. PD00581013.004 Interfaces ICP-PIII T able 3.04 Inova’ s ICP-PIII 32-Bit CompactPCI J2 Pin Assignment for Rear I/O (A) 4) : 5V open collector signal (5V/100mA) 5) : Option “External Battery” (Note: battery must be removed from CPU board) U bat = +3.4V to +3.6V 6) : RS485 signals Pin Nr Row A Row B Row [...]

  • Page 41

    ©2002 Inova Computers GmbH Page 3-7 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 T able 3.05 Inova’ s ICP-PIII 32-Bit CompactPCI J2 Pin Assignment for Rear I/O (B) 1) : 5V TTL signals from serial I/O controller 2) : T er mination of USB lines on CPU. The +5V and GND signals need fuses and inductors for decoupling (USB specification). [...]

  • Page 42

    ©2002 Inova Computers GmbH Page 3-8 Doc. PD00581013.004 Interfaces ICP-PIII T able 3.06 Inova’ s ICP-PIII 32-Bit CompactPCI J2 Pin Assignment for Rear I/O (C) 1) : 5V TTL signals from serial I/O controller 2) : T ermination of USB lines on CPU. The +5V and GND signals need fuses and inductors for decoupling (USB specification). 3) : The 5V LPT s[...]

  • Page 43

    ©2002 Inova Computers GmbH Page 3-9 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 T able 3.07 Inova’ s ICP-PIII Rear I/O J2 (CPU) Integration Currently three forms of rear I/O are available and, depending on the version currently in use, decides which (if any) of the J2 signals are available to the rear J2 connector . The rear I/O opti[...]

  • Page 44

    ©2002 Inova Computers GmbH Page 3-10 Doc. PD00581013.004 Interfaces ICP-PIII 3.1 CompactPCI Backplane The form factor defined for CompactPCI boards is based upon the Euro-card industry standard. Both 3U (100 mm by 160 mm) and 6U (233 mm by 100 mm) board sizes are defined. A Com- pactPCI system is composed of up to eight CompactPCI cards. The Compa[...]

  • Page 45

    ©2002 Inova Computers GmbH Page 3-11 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 ZABCDEF ZABCDEF ZABCDEF ZABCDEF ZABCDEF ZABCDEF ZABCDEF ZABCDEF Figure 3.10 Inova’ s 32-Bit CompactPCI 8-Slot Backplane - RH System Slot Note: The logical slots are differ ent to the physical slots. The slot marked with the ‘ g ‘ is the System Slot a[...]

  • Page 46

    ©2002 Inova Computers GmbH Page 3-12 Doc. PD00581013.004 Interfaces ICP-PIII 3.2 Interfaces 3.21 J7 & J12 Fast Ethernet J7 is available as standard on the CPU front-panel and, as an option, J12 may also be available but at the expense of the FireWir e inter face. The RJ45 interface supports both the 10BaseT and 100BaseTX twisted pair standard.[...]

  • Page 47

    ©2002 Inova Computers GmbH Page 3-13 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.22 J17 VGA Interface J17 is available on the CPU front-panel if this option is required and if this position is not already occupied by a PCI, PanelLink or GigaST ) R piggyback. The 15-pin high-density D-Sub connector forms the physical interface for the[...]

  • Page 48

    ©2002 Inova Computers GmbH Page 3-14 Doc. PD00581013.004 Interfaces ICP-PIII 2 5 6 65, 000 16.7M 640x480 60/72/75/85 60/72/75/85 60/72/75/85 800x600 60/72/75/85 60/72/75/85 60/72/75/85 1024x768 43I/60/70/ 75/85 43I/60/70/ 75/85 43I/60/70/ 75/85 1280x1024 43I/60/75 43I/60/75 N /A 1600x1200 43I 43I (not 65k) N/ A Note: 32k colours are not selectable[...]

  • Page 49

    ©2002 Inova Computers GmbH Page 3-15 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.23 J16 PanelLink Interface J16 is available if requested at time of order and replaces the standard VGA connector on the front- panel. Figure 3.23 PanelLink Interface Connector T able 2.12 PanelLink Inter face Pi n No . Signal 1 Tx2- 2 Tx1- 3 Tx0- 4 TxC-[...]

  • Page 50

    ©2002 Inova Computers GmbH Page 3-16 Doc. PD00581013.004 Interfaces ICP-PIII 2.24 J16 GigaST AR Interface The standard 9-pin D-Sub connector is used for GigaST AR video transmission. Figure 2.24 GigaST AR D-Sub Inter face Pinout T able 2.11 GigaST AR Interface 1 6 5 9 Pin No. Signal 1 GigaSTAR Tx+ 2 N/C 3 N/C 4 N/C 5 N/C 6 GigaSTAR Tx- 7 N/C 8 N/C[...]

  • Page 51

    ©2002 Inova Computers GmbH Page 3-17 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.25 J19 USB Interface J19 is located as standard on the front panel Figure 3.25 USB Interface Pinout T able 3.25 USB Connector Signals Pi n No . Signal 1 +5V 2 USB P0- 3 USB P0+ 4 GND Housing P E 1234[...]

  • Page 52

    ©2002 Inova Computers GmbH Page 3-18 Doc. PD00581013.004 Interfaces ICP-PIII 3.26 J15 FireWire Interface J15 is located on the front panel (if this option is available) Figure 3.26 FireW ire Inter face Pinout T able 3.26 Fir eWire Connector Signals 246 5 3 1 Pi n No . Signal 1 IEEE 1394 S +12V ( 1A Fuse) 2 IEEE 1394 S GND 3 IEEE 1294 S TPB- 4 IEEE[...]

  • Page 53

    ©2002 Inova Computers GmbH Page 3-19 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.27 J20 Infrared (iRdA) Interface This option is proprietary and not documented here. 3.28 J20 Reset Button The reset button allows the CPU to be rest in the event that it ‘hangs’ Performing a reset in this manner is known as a ‘warm’ start as pow[...]

  • Page 54

    ©2002 Inova Computers GmbH Page 3-20 Doc. PD00581013.004 Interfaces ICP-PIII 3.31 Connecting the PIII to the Inova IPB-FPE8 Appendix A provides more information on the IPB-FPE8 and its derivatives. Figure 3.31 shows how the CPU connects to the piggyback by a length of flex-cable. Figure 3.31 CPU to IPB-FPE8 Connection J11 J13 J10 J9 J4 J3 J14 J18 [...]

  • Page 55

    ©2002 Inova Computers GmbH Page 3-21 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.32 Connecting the PIII to the Inova ICP-HD-1 Appendix B provides more information on the ICP-HD-1 and its derivatives. Figure 3.32 shows how the CPU connects to the piggyback by lengths of flex-cable. Figure 3.32 CPU to ICP-HD-1 Connection J11 J13 J10 J9[...]

  • Page 56

    ©2002 Inova Computers GmbH Page 3-22 Doc. PD00581013.004 Interfaces ICP-PIII 3.33 Connecting the PIII to the Inova IPB-FPE12 Appendix C provides more information on the IPB-FPE12 and its derivatives. Figure 3.33 shows how the CPU connects to the piggyback by a length of flex-cable. The illustration also shows the IPB-FPE8 connection (Appendix A) F[...]

  • Page 57

    ©2002 Inova Computers GmbH Page 3-23 Doc. PD00581013.004 ICP-PIII Interfaces CompactPCI ® 3 3.34 Connecting the PIII to the Inova IPB-FPE12 Appendix C provides more information on the IPB-FPE12 and its derivatives. Figure 3.34 shows how the CPU connects to the piggyback by a length of flex-cable. The illustration also shows the ICP-HD-1 connectio[...]

  • Page 58

    ©2002 Inova Computers GmbH Page 3-24 Doc. PD00581013.004 Interfaces ICP-PIII 3.35 Connecting the PIII to the ICP-FD-1 Figure 3.35 shows how the CPU connects to the slim-line floppy disk unit. Figure 3.35 CPU to Slim-Line Floppy Disk Connection Floppy J11 J13 J10 J9 J4 J3 J14 J18 J6 PENTIUM III[...]

  • Page 59

    ©2001 Inova Computers GmbH Page A-1 CPU Appendix-A Appendix A IPB-FPE8 CompactPCI ® A IPB-FPE8 IPB-FPE8 Contents A1 IPB-FPE8 CPU Extension ......... A-2 A1.1 J11 Interface for COM1, Mouse & Keyboard ............................................ A-2 A1.2 IPB-FPE8 & Front-panel (4HP or 8HP) ...................................................[...]

  • Page 60

    ©2001 Inova Computers GmbH Page A-2 CPU Appendix-A IPB-FPE8 Appendix A A1 IPB-FPE8 CPU Extension The IPBFPE8 provides additional CPU functionality in the form of PS-2 style mouse and keyboard connectors and a serial COM1 port. A1.1 J11 Interface for COM1, Mouse & Keyboard The control of the mouse, keyboard and COM1 interfaces is performed thro[...]

  • Page 61

    ©2001 Inova Computers GmbH Page A-3 CPU Appendix-A Appendix A IPB-FPE8 CompactPCI ® A J11 Pin 1 A1.3 Stand-Alone IPB-FPE8 Figure A1.3 illustrates the construction of the stand-alone IPB-FPE8 piggyback and the underside location of the J11 connector . Care should be taken to ensure that pin 1 of J11 on the CPU base board is linked by an appropriat[...]

  • Page 62

    ©2001 Inova Computers GmbH Page A-4 CPU Appendix-A IPB-FPE8 Appendix A J10A J9A J10B J9B J18B J18A J11 Figure A1.4 Piggyback Interface IPB-FPE8MS Note that the IPB-FPE8 module does not allow a HD to be connected behind it and the lower 9- pin D-Sub slot may be used for remote connection of PanelLink for example. The IPB-FPE8MS shown in figure A1.4[...]

  • Page 63

    ©2001 Inova Computers GmbH Page A-5 CPU Appendix-A Appendix A IPB-FPE8 CompactPCI ® A COM1 PCB Cut-out: 1 DiskOnChip FLASH 2 For LPT1 Flex Cable 3 Flying Lead / Connector 4 Piggyback Flying Lead 5 IDE Flex-Cables [J9a, J10a] to CPU 2 3 4 5 Mouse Keyboard J11 A1.5 IPB-FPE8MS Description As mentioned previously , the IPB-FPE8MS has a number of addi[...]

  • Page 64

    ©2001 Inova Computers GmbH Page A-6 CPU Appendix-A IPB-FPE8 Appendix A A1.6 Keyboard Interface A front-panel with COM1, COM2 mouse and keyboard interfaces is either integrated into an 8HP standard CPU front-panel or available as a separate 4HP unit. The piggyback located behind these interfaces connects to the CPU-mounted J11 connector . Figure A1[...]

  • Page 65

    ©2001 Inova Computers GmbH Page A-7 CPU Appendix-A Appendix A IPB-FPE8 CompactPCI ® A A1.8 COM1 Interface The COM1 port features a complete set of handshaking and modem control signals, maskable interrupt generation and high-speed data transfer rates. A front-panel with COM1, mouse and keyboard interfaces is either integrated into an 8HP standard[...]

  • Page 66

    ©2001 Inova Computers GmbH Page A-8 CPU Appendix-A IPB-FPE8 Appendix A This page has been left blank intentionally .[...]

  • Page 67

    ©2001 Inova Computers GmbH Page B-1 CPU Appendix-B Appendix B ICP-HD CompactPCI ® B ICP-HD ICP-HD Contents B1 ICP-HD CPU Extension ............. B-2 B1.1 J11, J13 Interfaces .................................................................................... B-2 B1.2 ICP-HD-1 & Front-panel (4HP or 8HP) ........................................[...]

  • Page 68

    ©2001 Inova Computers GmbH Page B-2 CPU Appendix-B ICP-HD Appendix B B1 ICP-HD CPU Extension Several hard-disk connection possibilities exist of which two are documented here. Both of these provide additional CPU functionality in the form of PS-2 style mouse and keyboard connectors and serial COM1 and COM2 ports. B1.1 J11, J13 Interfaces The contr[...]

  • Page 69

    ©2001 Inova Computers GmbH Page B-3 CPU Appendix-B Appendix B ICP-HD CompactPCI ® B J13A J10A J9A J11 J13 J9 J10 B1.3 IDE Carrier Board ICP-HD-1 Figure B1.3 illustrates the construction of the stand-alone ICP-HD1 carrier and the underside loca- tion of the J11 & J13 connectors. The same mechanical construction applies to the integrated versio[...]

  • Page 70

    ©2001 Inova Computers GmbH Page B-4 CPU Appendix-B ICP-HD Appendix B J13 J11 J9 J10 J18 J13A J18A J10A J9A J1 J2 Figure B1.4 IDE Carrier ICP-HDE8MS The ICP-HDE8MS shown in figure B1.4 enables connection of floppy , a CD-ROM and other pe- ripherals. The connector names and descriptions are declared in table B1.4. B1.4 ICP-HDE8MS (Theme V ariation) [...]

  • Page 71

    ©2001 Inova Computers GmbH Page B-5 CPU Appendix-B Appendix B ICP-HD CompactPCI ® B * If connectors 9 and 10 are connected to a Master device then 9a and 10a must be connected to a Slave. Connector Description J 1 Standard Floppy Disk Connector - To Floppy Disk J 2 Standard IDE Connector - To Hard Disk / FLASH J9, J10 Primary HD (Master / Slave) [...]

  • Page 72

    ©2001 Inova Computers GmbH Page B-6 CPU Appendix-B ICP-HD Appendix B B1.5 ICP-HDE8MS Description As mentioned previously , the ICP-HDE8MS has a number of additional features compared to the standard ICP-HD-1 module. These extra features include HD and FD connection with both stand- ard connectors and the Inova flex cables. This provides the user w[...]

  • Page 73

    ©2001 Inova Computers GmbH Page B-7 CPU Appendix-B Appendix B ICP-HD CompactPCI ® B B1.6 Keyboard Interface A front-panel with COM1, COM2 mouse and keyboard interfaces is either integrated into an 8HP standard CPU front-panel or available as a separate 4HP unit. The piggyback located behind these interfaces connects to the CPU-mounted J11 connect[...]

  • Page 74

    ©2001 Inova Computers GmbH Page B-8 CPU Appendix-B ICP-HD Appendix B B1.8 COM1 & COM 2 Interfaces The two COM ports feature a complete set of handshaking and modem control signals, maskable interrupt generation and high-speed data transfer rates. A front-panel with COM1, COM2, mouse and keyboard interfaces is either integrated into an 8HP stan[...]

  • Page 75

    ©2001 Inova Computers GmbH Page B-1 CPU Appendix-B Appendix B IPM-ATA CompactPCI ® B IPM-A T A IPM-A T A B1 IPM-A T A CPU Extension ........... B-2 B1.1 J1 Interfaces ............................................................................................. B-2 Figure B1.1a Dedicated IPM-A T A Backplane ........................................[...]

  • Page 76

    ©2001 Inova Computers GmbH Page B-2 CPU Appendix-B IPM-ATA Appendix B B1 IPM-A T A CPU Extension Inova Plug-In Module (IPM-) offers the user the ability to exchange a hard-disk for example with- out having to remove the CPU from the CompactPCI enclosure and then dismantle it etc. Cur- rently , three units exist that provide industr y with hard-dis[...]

  • Page 77

    ©2001 Inova Computers GmbH Page B-3 CPU Appendix-B Appendix B IPM-ATA CompactPCI ® B B1.1 J1 Interfaces (Contd.) Standard IDE ribbon-cable is used to connect J2 of the IPB-RIO-HD-FD module to the IPM’ s dedi- cated backplane. The use of ribbon cable permits the mass-storage device(s) to be positioned at any convenient location within the Compac[...]

  • Page 78

    ©2001 Inova Computers GmbH Page B-4 CPU Appendix-B IPM-ATA Appendix B B1.2 IPM-A T A-HD The IPM-A T A-HD has provision for one standard notebook (2.5”) EIDE device (FLASH or hard-disk) and one Compact FLASH or MicroDrive site. Figure B1.2 illustrates the significant connectors for this device while T able B1.2 indicates the jumper positions for [...]

  • Page 79

    ©2001 Inova Computers GmbH Page B-5 CPU Appendix-B Appendix B IPM-ATA CompactPCI ® B B1.3 IPM-A T A-CF The IPM-A T A-CF has provision for one or two standard Compact FLASH or MicroDrive devices. Figure B1.3 illustrates the significant connectors for this device while T able B1.3 indicates the jumper settings for the various Master/Slave device co[...]

  • Page 80

    ©2001 Inova Computers GmbH Page B-6 CPU Appendix-B IPM-ATA Appendix B B1.4 IPM-A T A-PCMCIA The IPM-A T A-PCMCIA has provision for one standard A T A PCMCIA device and one Compact FLASH or MicroDrive site. Figure B1.4 illustrates the significant connectors for this device while T able B1.4 indicates the jumper settings for the various Master/Slave[...]

  • Page 81

    ©2001 Inova Computers GmbH Page B-7 CPU Appendix-B Appendix B IPM-ATA CompactPCI ® B B1.5 Device Compatibility Because of the diversity of Compact FLASH devices available with different ar chitectures and error recovery routines etc. there is a strong possibility that some Master / Slave combinations will fail to be recognised by the BIOS. T o he[...]

  • Page 82

    ©2001 Inova Computers GmbH Page B-8 CPU Appendix-B IPM-ATA Appendix B This page has been left blank intentionally .[...]

  • Page 83

    ©2001 Inova Computers GmbH Page C-1 CPU Appendix-C Appendix C IPB-FPE12 CompactPCI ® C IPB-FPE12 IPB-FPE12 Contents C1 IPB-FPE12 CPU Extension ........ C-2 C1.1 J13 Interface for LPT1 & COM2 ............................................................... C-2 C1.2 IPB-FPE12 & Front-panel (4HP or 12HP) ......................................[...]

  • Page 84

    ©2001 Inova Computers GmbH Page C-2 CPU Appendix-C IPB-FPE12 Appendix C C1 IPB-FPE12 CPU Extension The Inova IPB-FPE12 adds LPT and COM2 functionality to any Inova CPU. The piggyback is avail- able as a stand-alone device with its own 4HP front-panel or integrated within a 12HP K6 or PPC front-panel. The information documented here is valid regard[...]

  • Page 85

    ©2001 Inova Computers GmbH Page C-3 CPU Appendix-C Appendix C IPB-FPE12 CompactPCI ® C J13 C1.3 LPT1 & COM2 Piggyback Figure C1.3 illustrates the construction of the stand-alone IPB-FPE12 piggyback and the upperside location of the J13 connector . The same mechanical construction applies to the integrated ver- sion. Care should be taken to en[...]

  • Page 86

    ©2001 Inova Computers GmbH Page C-4 CPU Appendix-C IPB-FPE12 Appendix C T able C1.3 IPB-FPE12 Connector Description Connector Description J 1 3 LPT1 & COM2 Note: Other Inova piggybacks (ICP-HD-1 & ICP- HDE8) pr ovide J13a to “daisy-chain” the LPT1 / COM2 interfaces. If these connec- tors are used for the integration of the IPB-FPE12 th[...]

  • Page 87

    ©2001 Inova Computers GmbH Page C-5 CPU Appendix-C Appendix C IPB-FPE12 CompactPCI ® C C1.4 LPT1 Interface A front-panel with LPT1 and COM2 interfaces is either integrated into a 12HP standard CPU front- panel or available as a separate 4HP unit. The piggyback located behind these interfaces connects to the CPU-mounted J13 connector . Figure C1.6[...]

  • Page 88

    ©2001 Inova Computers GmbH Page C-6 CPU Appendix-C IPB-FPE12 Appendix C C1.5 COM2 Interface The COM2 port features a complete set of handshaking and modem control signals, maskable interrupt generation and high-speed data transfer rates. A front-panel with LPT1 and COM2 inter- faces is either integrated into a 12HP standard CPU front-panel or avai[...]

  • Page 89

    ©2001 Inova Computers GmbH Page D-1 CPU Appendix-D Appendix D IPB-RIO CompactPCI ® D IPB-RIO IPB-RIO Contents D1 IPB-RIO CPU Extension ............ D-2 D1.1 IPB-RIO-HD-FD ....................................................................................... D-2 Figure D1.1 IPB-RIO-HD-FD ...........................................................[...]

  • Page 90

    ©2001 Inova Computers GmbH Page D-2 CPU Appendix-D IPB-RIO Appendix D D1 IPB-RIO CPU Extension T o enhance the I/O and serviceability of their CPUs, Inova have introduced rear I/O modules that connect to a CompactPCI connector on the rear of the Master Slot on the backplane. All standard Inova backplanes are equipped with this R2 connector so that[...]

  • Page 91

    ©2001 Inova Computers GmbH Page D-3 CPU Appendix-D Appendix D IPB-RIO CompactPCI ® D D1.2 IPB-RIO-HD-LPT -(FLEX) Similar to the IPB-RIO-HD-FD, this transition module recovers the embedded IDE and LPT signals from the CompactPCI backplane and presents them in a form ready for device connection. This time, instead of a standard IDE header , the IDE[...]

  • Page 92

    ©2001 Inova Computers GmbH Page D-4 CPU Appendix-D IPB-RIO Appendix D D1.3 IPB-RIO-C-SHORT All Inova -RIO(C) compatible CPUs can take advantage of this transition module as it allows the signals shown in table D1.3 to be recovered (used). Figure D1.3 illustrates this piggyback and points to the available interfaces. Figure D1.3 IPB-RIO-C-SHOR T T [...]

  • Page 93

    ©2001 Inova Computers GmbH Page D-5 CPU Appendix-D Appendix D IPB-RIO CompactPCI ® D D1.4 IPB-RIO-C-80MM Similar to the -SHORT version, this transition module extends the signals shown in table D1.3 to a rear panel. Naturally , not all enclosures are suitable for this type of connection and the following must be considered. N Inova Desktop system[...]

  • Page 94

    ©2001 Inova Computers GmbH Page D-6 CPU Appendix-D IPB-RIO Appendix D This page has been left blank intentionally .[...]