Fujitsu MB15E07SL manual

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Table of contents for the manual

  • Page 1

    DS04-21358-4E FUJITSU SEMICONDUCT OR DA T A S H E E T ASSP Single Serial Input PLL Frequenc y Synthesizer On-c hip 2.5 GHz Prescaler MB15E07SL ■ ■ ■ ■ DESCRIPTION The Fujitsu MB15E07SL is a serial input Phase Lock ed Loop (PLL) frequency synthesizer with a 2.5 GHz prescaler . The 2.5 GHz prescaler has a dual modulus division ratio of 32/33 [...]

  • Page 2

    MB15E07SL 2 (Continued) • Dual modulus prescaler : 32/33 or 64/65 • Serial input 14-bit programmab le reference divider: R = 3 to 16,383 • Serial input programmab le divider consisting of: - Binar y 7-bit s wallo w counter : 0 to 127 - Binar y 11-bit programmab le counter : 3 to 2,047 • Software selectab le charge pump current • On-chip p[...]

  • Page 3

    MB15E07SL 3 ■ PIN DESCRIPTIONS Pin no. Pin name I/O Descriptions SSOP BCC 11 6 O S C IN I Programmable reference divider input. Connection to a TCXO. 21 O S C OUT O Oscillator output. 32 V P – Power supply voltage input for the charge pump. 43 V CC – Power supply voltage input. 54 D O O Charge pump output. Phase of the charge pump can be sele[...]

  • Page 4

    MB15E07SL 4 ■ BLOCK DIA GRAM Clock Data fin LE OSC OUT OSC IN PS D O V P φ R LD / fout φ P Prescaler 32/33 64/65 Xfin GND V CC MD ZC C N T SW FC CS LDS fr fp . . . . . . . . (16) (1) (2) (3) (4) (5) (6) (7) (15) (14) (13) (12) (11) (10) (9) (8) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 Reference oscillator circuit Binary 14-bit reference counter P[...]

  • Page 5

    MB15E07SL 5 ■ ABSOLUTE MAXIMUM RA TINGS W ARNING: Semiconductor de vices can be per manently damaged by application of stress (v oltage, current, temperature , etc.) in e xcess of absolute maximum ratings. Do not e xceed these ratings. ■ RECOMMENDED OPERA TING CONDITIONS W ARNING: The recommended operating conditions are required in order to en[...]

  • Page 6

    MB15E07SL 6 ■ ELECTRICAL CHARA CTERISTICS (V CC = 2.4 to 3.6 V , T a = –40 to +85 ° C) *1 : Conditions; f osc = 12 MHz, T a = +25 ° C, in loc king state. *2 : V CC = V P = 3.0 V , f osc = 12.8 MHz, T a = +25 ° C , in power sa ving mode P arameter Symbol Condition Va l u e Unit Min T yp Max Power supply current* 1 I CC *1 fin = 2500 MHz, V CC[...]

  • Page 7

    MB15E07SL 7 *3 : A C coupling. 1000 pF capacitor is connected under the condition of Min operating frequency . *4 : The symbol “–” (minus) means direction of current flo w . *5 : V CC = V P = 3.0 V , T a = +25 ° C (|I 3 | – |I 4 |) / [(|I 3 | + |I 4 |) /2] × 100(%) *6 : V CC = V P = 3.0 V , T a = +25 ° C [(|I 2 | – |I 1 |) /2] / [(|I 1[...]

  • Page 8

    MB15E07SL 8 ■ FUNCTIONAL DESCRIPTION 1. Pulse Swallow Function The divide ratio can be calculated using the f ollowing equation: f VCO = [(M × N) + A] × f OSC ÷ R (A < N) f VCO : Output frequency of e xter nal voltage controlled oscillator (VCO) N : Preset divide ratio of binary 11-bit programmable counter (3 to 2,047) A : Preset divide rat[...]

  • Page 9

    MB15E07SL 9 T able 2. Binary 14-bit Programmable Ref erence Counter Data Setting Note : Divide ratio less than 3 is prohibited. T able 3. Binary 11-bit Programmable Counter Data Setting Note : Divide ratio less than 3 is prohibited. T able 4. Binary 7-bit Swallow Counter Data Setting Divide ratio (R) R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 3[...]

  • Page 10

    MB15E07SL 10 T able 5. Prescaler Data Setting T able 6. Charge Pump Current Setting T able 7. LD/fout Output Select Data Setting (2) Relation between the FC Input and Phase Characteristics The FC bit changes the phase characteristics of the phase comparator . Both the inter nal charge pump output le v el (D O ) and the phase compar ator output ( φ[...]

  • Page 11

    MB15E07SL 11 When designing a synthesizer, the FC pin setting depends on the VCO and LPF characteristics. 3. Do Output Contr ol T able 9. ZC Pin Setting 4. P ower Sa ving Mode (Intermittent Mode Control Cir cuit) T able 10. PS Pin Setting The inter mittent mode control circuit reduces the PLL pow er consumption. By setting the PS pin low , the devi[...]

  • Page 12

    MB15E07SL 12 Note : PS pin must be set “L” f or P ow er-ON . ON OFF V CC Clock Data LE PS (1) (2) (3) t V ≥ 1 µ s t PS ≥ 100 ns (1) PS = L (power saving mode) at Power ON (2) Set serial data 1 µ s later after power supply remains stable (V CC > 2.2 V). (3) Release power saving mode (PS: L → H) 100 ns later after setting serial data.[...]

  • Page 13

    MB15E07SL 13 ■ SERIAL D A T A INPUT TIMING 1st data 2nd data Control bit Invalid data Data Clock LE MSB LSB t 1 t 2 t 3 t 6 t 5 t 4 t 7 ∼ ∼ ∼ ∼ Note : LE should be “L” when the data is transf erred into the shift register . Pa r a m e t e r M i n T y p M a x U n i t t 1 20 – – ns t 2 20 – – ns t 3 30 – – ns t 4 30 – – [...]

  • Page 14

    MB15E07SL 14 ■ PHASE COMP ARA T OR OUTPUT W A VEFORM fr fp LD D O D O t WU t WL Notes : • Phase error detection range: –2 π to +2 π • Pulses on Do signal dur ing lock ed state are output to prev ent dead zone . • LD output becomes low when phase is t WU or more . LD output becomes high when phase error is t WL or less and continues to b[...]

  • Page 15

    MB15E07SL 15 ■ MEASURMENT CIRCUIT (f or Measuring Input Sensitivity fin/OSC IN ) S • G 50 Ω 1000 pF S • G 50 Ω 1000 pF 0.1 µ F 0.1 µ F 86 4 3 1 91 0 1 1 1 2 1 4 75 2 13 15 16 1000 pF V CC fin Xfin GND D O V CC V P OSC OUT OSC IN Clock Data LE PS ZC LD / fout φ P φ R Controller (setting divide ratio) Oscilloscope Note: SSOP-16[...]

  • Page 16

    MB15E07SL 16 ■ TYPICAL CHARA CTERISTICS 1. fin input sensitivity Input sensitivity − Input frequency (Prescaler: 64/65) Input frequency fin (MHz) Input sensitivity Pfin (dBm) Input sensitivity − Input frequency (Prescaler: 32/33) Input sensitivity Pfin (dBm) Input frequency fin (MHz) 10 0 − 10 − 20 − 30 − 40 − 50 0 200 400 600 800 1[...]

  • Page 17

    MB15E07SL 17 2. OSC IN input sensitivity Input sensitivity − Input frequency Input frequency f OSC (MHz) Input sensitivity V OSC (dBm) 10 0 − 10 − 20 − 30 − 40 − 50 − 60 0 50 100 150 200 V CC = 2.4 V V CC = 3.0 V V CC = 3.6 V Ta = +25 ° C SPEC[...]

  • Page 18

    MB15E07SL 18 3. Do output current V DO - I DO V DO - I DO Charge pump output voltage V DO (V) Charge pump output current I DO (mA) Charge pump output voltage V DO (V) Charge pump output current I DO (mA) 10.00 –10.00 0 .6000/div 4.800 2.000 /div 0 Ta = +25 ° C V CC = 3.0 V Vp = 3.0 V I DOH I DOL 10.00 –10.00 0 .6000/div 4.800 2.000 /div 0 Ta =[...]

  • Page 19

    MB15E07SL 19 4. fin input impedance 5. OSC IN input impedance 12.646 Ω –57.156 Ω 1 GHz 22.156 Ω –12.136 Ω 1.5 GHz 33.805 Ω 11.869 Ω 2 GHz 1 : 2 : 3 : 4 : 23.715 Ω 8.9629 Ω 2.5 GHz 1 4 3 2 START 500.000 000 MHz STOP 2 500.000 000 MHz 9.917 Ω –3.643 Ω 3 MHz 3.7903 Ω –4.812 Ω 10 MHz 1.574 Ω –3.4046 Ω 20 MHz 1 : 2 [...]

  • Page 20

    MB15E07SL 20 ■ REFERENCE INFORMA TION (Continued) S.G Spectrum Analyzer OSC IN fin Do LPF VCO Test Circuit f VCO = 810.45 MHz K V = 17 MHz/V fr = 25 kHz f OSC = 14.4 MHz V CC =V P = 3.0 V V VCO = 2.3 V Ta = +25 ° C CP : 6 mA mode 9.1 k Ω 4.2 k Ω 0.047 µ F 1500 pF 4700 pF LPF REF –5.0 dBm ATT 10 dB 10 dB/ RBW 1 kHz SAMPLE VBW 1 kHz MKR 25.[...]

  • Page 21

    MB15E07SL 21 (Continued) 846.000 MHz 826.004000 MHz 826.000000 MHz 825.996000 MHz 826.000 MHz 806.000 MHz 500.0 µ s/div 500.0 µ s/div 810 MH → 826 MHz within ± 1 kHz Lch → Hch 1.30 ms 838.000 MHz 818.000 MHz 798.000 MHz 500.0 µ s/div PLL Lock Up time PLL Lock Up time 826 MH → 810 MHz within ± 1 kHz Hch → Lch 1.28 ms 500.0 µ s/div 810.[...]

  • Page 22

    MB15E07SL 22 ■ ■ ■ ■ APPLICA TION EXAMPLE 10 k Ω 0.1 µ F 1000 pF OUTPUT V P 12 k Ω 12 k Ω 10 k Ω LPF VCO 16 15 14 13 12 11 10 9 12 3 4 5 6 7 8 0.1 µ F 1000 pF TCXO 1000 pF Lock Det. φ R φ P LD/fout ZC Clock MB15E07SL From a controller PS LE Data OSC IN OSC OUT V P V CC D O GND Xfin fin V P : 5.5 V Max Notes : • SSOP-16 • In [...]

  • Page 23

    MB15E07SL 23 ■ USA GE PRECA UTIONS T o protect against damage by electrostatic discharge , note the follo wing handling precautions: -Store and transpor t devices in conductiv e containers. -Use properly grounded workstations, tools , and equipment. -T ur n off power bef ore inser ting device into or remo ving device from a soc ket. -Protect lead[...]

  • Page 24

    MB15E07SL 24 ■ ■ ■ ■ P A CKA GE DIMENSIONS (Continued) C 2003 FUJITSU LIMITED F16013S-c-4-6 5.00±0.10(.197±.004) 4.40±0.10 6.40±0.20 (.252±.008) (.173±.004) .049 –.004 +.008 –0.10 +0.20 1.25 (Mounting height) 0.10(.004) 0.65(.026) 0.24±0.08 (.009±.003) 1 8 16 9 "A" 0.10±0.10 (Stand off) 0.17±0.03 (.007±.001) M 0.13([...]

  • Page 25

    MB15E07SL 25 (Continued) C 1999 FUJITSU LIMITED C16017S-1C-1 0.325±0.10 (.013±.004) 3.40(.134)TYP "A" 0.40±0.10 (.016±.004) 2.45(.096) 0.80(.031) REF TYP 4.55±0.10 (.179±.004) 0.80(.031)MAX Mounting height 0.075±0.025 (.003±.001) (Stand off) 0.05(.002) 6 9 1 14 9 14 1 6 0.40±0.10 (.016±.004) 0.75±0.10 (.030±.004) Details of &q[...]

  • Page 26

    MB15E07SL FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference[...]