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Cypress STK12C68 manual

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Table of contents for the manual

  • Page 1

    STK12C68 64 Kbit (8K x 8) AutoS tore nvSRAM Cypress Semiconducto r Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 001-51027 Rev . ** Revised January 30, 2009 Features ■ 25 ns, 35 ns, and 45 ns acce ss times ■ Hands off automatic STORE on power dow n with external 68 µF cap acitor ■ STORE to [...]

  • Page 2

    STK12C68 Document Number: 001-51027 Rev . ** Page 2 of 20 Pin Configurations Pin Definitions Pin Name Alt IO T ype Description A 0 –A 12 Input Address Input s. Used to select one of the 8,19 2 bytes of th e nvSRAM. DQ 0 -DQ 7 Input or Output Bidirectiona l Data IO Lines . Used as input or output lines depending on ope ration. WE W Input Write Ena[...]

  • Page 3

    STK12C68 Document Number: 001-51027 Rev . ** Page 3 of 20 Device Operation The STK12C68 nvSRAM is mad e up of two functional compo- nents paired in the same physical cell. These ar e an SRAM memory cell and a nonvolatile QuantumTrap cell. The SRAM memory cell operates as a standard fast static RAM. Data in the SRAM is transferred to the nonvolatile[...]

  • Page 4

    STK12C68 Document Number: 001-51027 Rev . ** Page 4 of 20 Figure 3. AutoStore Inhi bit Mode If the power supply drops faster than 20 us/volt before Vcc reaches V SWITCH , then a 2.2 ohm resistor shou ld be con nected between V CC and the system supply to avoid momentary excess of current between V CC and V CAP . AutoStore Inhibit Mode If an automat[...]

  • Page 5

    STK12C68 Document Number: 001-51027 Rev . ** Page 5 of 20 3. Read address 0x0AAA, V alid READ 4. Read address 0x1FFF , V ali d READ 5. Read address 0x10F 0, V alid READ 6. Read address 0x0F0E, Initiate RECALL cycle Internally , RECALL is a two step procedure. First, the SRAM data is cleared; then, the nonvo latile information is transferred into th[...]

  • Page 6

    STK12C68 Document Number: 001-51027 Rev . ** Page 6 of 20 Best Practices nvSRAM products have been used effectively for over 15 years. While ease-of-use is one of t he product’s m ain system values, experience gained worki ng with hundreds of applic ations has resulted in the following suggestion s as be st practices: ■ The nonvolatile cell s i[...]

  • Page 7

    STK12C68 Document Number: 001-51027 Rev . ** Page 7 of 20 Maximum Ratin gs Exceeding maximum ratings may shorten the useful life of the device. These user g uidelines are not tested. S torage T emperature ............. ... .. ... ............ –65 ° C to +150 ° C T emperature under Bias ......... .................... –55 ° C to +125 ° C V ol[...]

  • Page 8

    STK12C68 Document Number: 001-51027 Rev . ** Page 8 of 20 Dat a Retention and Endurance Parameter Description Min Unit DA T A R Data Retention 100 Y ears NV C Nonvolatile STORE Operations 1,000 K Cap acit ance In the following table, the capacitance parameters are listed. [6] Parameter Description T e st Conditions Max Unit C IN Input Capacitance T[...]

  • Page 9

    STK12C68 Document Number: 001-51027 Rev . ** Page 9 of 20 AC Switching Characteristics SRAM Read Cycle Parameter Descr iption 25 ns 35 ns 45 ns Unit Min Max Min Max Min Max Cypress Parameter Alt t ACE t ELQV Chip Enable Access T i me 25 35 45 ns t RC [7] t AVAV, t ELEH Read Cycle Time 25 35 45 ns t AA [8] t AV Q V Address Access T ime 25 35 45 ns t[...]

  • Page 10

    STK12C68 Document Number: 001-51027 Rev . ** Page 10 of 20 SRAM Writ e Cycle Parameter Description 25 ns 35 ns 45 ns Unit Min Max Min Max Min Max Cypress Parameter Alt t WC t AVAV Write Cycle T ime 25 35 45 ns t PWE t WL WH, t WLEH Write Pulse Width 20 25 30 ns t SCE t EL WH, t ELEH Chip Enable T o End of Write 20 25 30 ns t SD t DVWH, t DVEH Data [...]

  • Page 11

    STK12C68 Document Number: 001-51027 Rev . ** Page 1 1 of 20 AutoS tore or Power Up RECALL Parameter Alt Description STK12C68 Unit Min Max t HRECALL [13] t RESTORE Power up RECALL Duration 550 μ s t STORE [14, 15 , 16] t HLHZ STORE Cycle Duration 10 ms t DELA Y [9, 15] t HLQZ , t BLQZ T ime Allowed to Complete SRAM Cycle 1 μ s V SWITCH Low V oltag[...]

  • Page 12

    STK12C68 Document Number: 001-51027 Rev . ** Page 12 of 20 Sof tware Controlled STORE/RECALL Cycle The software controlled ST ORE/RECALL cycle follows. [18] Parameter Alt Description 25 ns 35 ns 45 n s Unit Min Max Min Max Min Max t RC [14] t AVAV STORE/RECALL Initiation Cycle T ime 25 35 45 ns t SA [17] t A VEL Address Setup Time 0 0 0 ns t CW [17[...]

  • Page 13

    STK12C68 Document Number: 001-51027 Rev . ** Page 13 of 20 Hardware STORE Cycle Parameter Alt Description STK12C68 Unit Min Max t STORE [9, 14] t HLHZ STORE Cycle Duration 10 ms t DHSB [14, 19] t RECOVER, t HHQX Hardware STORE High to Inhibit Off 700 ns t PHSB t HLHX Hardware STORE Pulse Width 15 ns t HLBL Hardware STORE Low to ST ORE Busy 300 ns S[...]

  • Page 14

    STK12C68 Document Number: 001-51027 Rev . ** Page 14 of 20 Part Numbering nomenclature Packaging Option: TR = T a pe and Reel Blank = Tube S peed: 25 - 25 ns 35 - 35 ns Package: S = Plastic 28-pin 330 mil SOIC STK12C68 - S F 45 I TR T empe rature Range : C - Com m ercial (0 to 70°C ) P W = Plastic 28-pin 600 mil DIP C = Ceramic 28-pin 300 mil DIP [...]

  • Page 15

    STK12C68 Document Number: 001-51027 Rev . ** Page 15 of 20 45 ST K12C68-SF45TR 001-85058 28-pin SOIC (330 mil) Commercial STK12C68-SF45 001-85058 28-pin SOIC (330 mil) STK12C68-PF45 001-85014 28-pin PDIP (300 mil) STK12C68-WF45 001-85017 28-pin PDIP (600 mil) STK12C68-C45 001-51695 28-pin CDIP (300 mil) STK12C68-L45 001-51696 28-pin LCC (350 mil) S[...]

  • Page 16

    STK12C68 Document Number: 001-51027 Rev . ** Page 16 of 20 Package Diagrams Figure 14. 28-Pin (330 Mil) SOIC (51-85058) Figure 15. 28-Pin (30 0 Mil) PDIP (51-85014) 51-85058 *A 51-85014 *D [+] Feedback[...]

  • Page 17

    STK12C68 Document Number: 001-51027 Rev . ** Page 17 of 20 Figure 16. 28-Pin (60 0 Mil) PDIP (51-85017) Package Diagrams (continued) 51-85017 *B [+] Feedback[...]

  • Page 18

    STK12C68 Document Number: 001-51027 Rev . ** Page 18 of 20 Figure 17. 28-Pin (300 Mil) Side Braze DIL (001-51695) Package Diagrams (continued) 001-51695 ** [+] Feedback[...]

  • Page 19

    STK12C68 Document Number: 001-51027 Rev . ** Page 19 of 20 Figure 18. 28-Pad (350 Mil) LCC (0 01-51696) Package Diagrams (continued) 1. A L L D IM E N SI O N A R E IN IN CH E S AND M ILL IM E TE RS [M IN /M AX ] 2. JEDEC 95 OUT LINE# M O-041 3. PACKAGE WEIGHT : TBD 001-51696 ** [+] Feedback[...]

  • Page 20

    Document Number: 001-51027 Rev . ** Revised January 30, 20 09 Page 20 of 20 AutoS tore and Qua ntumTr ap are registered tr ademarks of Cypress Se miconductor Corpor ation. All produ cts and comp any names mentio ned in this docum ent may be the trade marks of t heir respe ctive holders. STK12C68 © Cypress Semicondu ctor Corpor ation, 2006-200 9. T[...]