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Cypress CY7C1034DV33 manual

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Table of contents for the manual

  • Page 1

    Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1 709 • 408-943-2600 Document Number: 001-08351 Rev . *C Revised January 16, 2009 CY7C1034DV33 6-Mbit (256K X 24) S tatic RAM Features ■ High speed ❐ t AA = 10 ns ■ Low active po wer ❐ I CC = 175 mA at 10 ns ■ Low CMOS standby power ❐ I SB2 = 25 mA ■ O[...]

  • Page 2

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 2 of 9 Selection Guide Description –10 Unit Maximum Access T ime 10 ns Maximum Operating Current 175 mA Maximum CMOS S t andby Current 25 mA Pin Configuration Figure 1. 1 19-Ball PBGA Top View [1] 1234567 A N C AAAAA N C B NC A A CE 1 AA N C C IO 12 NC CE 2 AC E 3 NC IO 0 D IO 13 V DD V SS V S[...]

  • Page 3

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 3 of 9 Maximum Ratings Exceeding maximum ratin gs may impair the useful life of the device. These user guidelines are not teste d. S torage T emperature ............. .............. ...... –65 ° C to +150 ° C Ambient T emperat ure with Power Applied ....... .............. .............. ....[...]

  • Page 4

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 4 of 9 Figure 2. AC T est Loads and Waveform [4] AC Switching Ch aracteristics Over the operating range [5] Parameter Description –10 Unit Min Max Read Cycle t power [6] V CC (T ypical) to the First Access 100 μ s t RC Read Cycle T ime 10 ns t AA Address to Data V alid 10 ns t OHA Data Hold f[...]

  • Page 5

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 5 of 9 Write Cycle [9, 10] t WC Write Cycle T ime 10 ns t SCE CE Active LOW to Write End [3] 7n s t AW Address Setup to W rite End 7 ns t HA Address Hold from Write End 0 ns t SA Address Setup to W rite S tart 0 ns t PWE WE Pulse Wid th 7 ns t SD Data Setup to Writ e End 5.5 ns t HD Data Hold fr[...]

  • Page 6

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 6 of 9 Switching W aveforms Figure 4. Read Cycle No. 1 (Address Trans ition Controlled) [13, 14] Figure 5. Read Cycle No. 2 (OE Controlled) [3, 14, 15] Figure 6. Write Cycle No. 1 (CE Controlled) [3, 16, 17] PREVIOUS DATA VALID DATA VALID RC t AA t OHA t RC ADDRESS DATA OUT 50% 50% DA T A V ALID[...]

  • Page 7

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 7 of 9 Figure 7. W rite Cy cle No. 2 (WE Cont rolled, OE HIGH During W ri te) [3, 16, 17] Figure 8. Write Cycle No. 3 (WE Cont rolled, OE LOW) [3, 17] T ruth T able CE 1 CE 2 CE 3 OE WE IO 0 – IO 23 Mode Power H XXXX H i g h Z P o w e r D o w n S t a n d b y ( I SB ) X L X X X High Z Power Dow[...]

  • Page 8

    CY7C1034DV33 Document Number: 001-08351 Rev . *C Page 8 of 9 Ordering Information Spee d (ns) Ordering Code Package Name Package T yp e Operating Range 10 CY7C1034DV33-1 0BGXI 51-851 15 1 19-Ball Plasti c Ball Grid Array (14 x 22 x 2.4 mm) (Pb-Free) Indu strial Package Diagram Figure 9. 1 19-Ball PB GA (14 x 22 x 2.4 mm) 51-851 15-*B [+] Feedback[...]

  • Page 9

    CY7C1034DV33 © Cypress Sem iconductor Corp oration, 200 6-2009. The informatio n containe d herein is su bject to change without notice. C ypress S emiconductor Corp oration assumes no responsibility for th e use of any circuitry othe r than circuitry embod ied in a Cypress prod uct. Nor does it convey or imp ly any license under p atent or ot her[...]