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Cypress CY62158E manual

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Table of contents for the manual

  • Page 1

    CY62158E MoBL ® 8-Mbit (1M x 8) S t atic RAM Cypress Semiconductor Corpora tion • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document #: 38-05684 Rev . *D Revised June 16, 2 008 Features ■ V ery high speed: 45 ns ❐ Wide voltage range: 4.5V – 5.5V ■ Ultra low active power ❐ T ypical act ive current: 1.8 mA @ f = 1 [...]

  • Page 2

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 2 of 10 Pin Configuration Figure 1. 44-Pin TSO P II (T op View) [1] Product Port folio Product V CC Range (V) Speed (ns) Power Dissip ation Operating I CC (mA) St andby I SB2 ( μ A) f = 1 MHz f = f max Min T yp [2] Max T yp [2] Max T yp [2] Max T yp [2] Max CY62158ELL 4.5 5.0 5.5 45 1.8 3 18 25 2[...]

  • Page 3

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 3 of 10 Maximum Ratin gs Exceeding the maximu m ratings may impair the useful l ife of the device. These user guid elines are not tested. S torage T emperature ................. .............. ... –65°C to +150°C Ambient T e mperature with Power Applied ............ ............... ...........[...]

  • Page 4

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 4 of 10 Figure 2. AC T est Loads and Waveforms Parameters 5.0V Unit R1 1838 Ω R2 994 Ω R TH 645 Ω V TH 1.75 V Dat a Retention Characteristics Over the Operatin g Range Parameter Descriptio n Conditions Min Ty p [2] Max Unit V DR V CC for Data Retention 2 V I CCDR [6] Data Retention Current V CC[...]

  • Page 5

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 5 of 10 Switching Characteristics Over the Operatin g Range [9] Parameter Descriptio n 45 ns Unit Min Max Read Cycle t RC Read Cycle Time 45 ns t AA Address to Data V al id 45 ns t OHA Data Hold from Address Change 10 ns t ACE CE 1 LOW and CE 2 HIGH to Data V alid 45 ns t DOE OE LOW to Data V ali [...]

  • Page 6

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 6 of 10 Switching W aveforms Figure 4 shows address transition controlled read cycle waveforms. [13, 14] Figure 4. Read Cycle No. 1 Figure 5 shows OE controlled read cycle waveforms. [14, 15] Figure 5. Read Cycle No. 2 ADDRESS DATA OUT PREVIOUS DA TA VALID DATA VALID t RC t AA t OHA 50% 50% DATA V[...]

  • Page 7

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 7 of 10 Figure 6 shows WE controlled write cycle waveforms. [12, 16, 17] Figure 6. Write Cycle No. 1 Figure 7 shows CE 1 or CE 2 controlled write cycle waveforms. [12, 16, 17] Figure 7. Write Cycle No. 2 Switching W aveforms (continued) t HD t SD t PWE t SA t HA t AW t SCE t WC t HZOE VALID DATA N[...]

  • Page 8

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 8 of 10 Figure 8 shows WE controlled, OE LOW write cycle waveforms. [17] Figure 8. Write Cycle No. 3 T ruth T able CE 1 CE 2 WE OE Input s/Outputs Mode Power H XXX High Z Deselect/Power Down S tandby (I SB ) XL XX High Z Deselect/Pow er Down S tandby (I SB ) L H H L Data Out Read Active (I CC ) L [...]

  • Page 9

    CY62158E MoBL ® Document #: 38-05684 Rev . *D Page 9 of 10 Package Diagrams Figure 9. 44-Pin TSOP II, 51-85087 51-85087-*A [+] Feedback[...]

  • Page 10

    Document #: 38-05684 Rev . *D Revised June 16, 2008 Page 10 of 10 All product s and company names me ntioned in this document may be the trademarks of the ir respective h olders. CY62158E MoBL ® © Cypress Semiconducto r Corporatio n, 2008. The informati on contained herein is subject to change without noti ce. Cypress Semico nductor Corporation a[...]