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Atmel AT91EB42 manual

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Table of contents for the manual

  • Page 1

    AT91EB42 Evaluation Board ................. .................... ................... ................... .. User Guide[...]

  • Page 2

    [...]

  • Page 3

    i T able of Contents Section 1 Overview .............. .............. .............. .............. .............. .............. ........... 1 -1 1.1 Scope .... .................... ................... ................... .................... ................... ... 1-1 1.2 Deliverab les .............. ................... ................... .....[...]

  • Page 4

    Table of Contents ii Section 5 Append ix A – Configura tion Straps ...... .............. .............. .............. ....... 5-1 5.1 Configur ation Straps ( CB1 - 23, J P1 - 8) ............... ................... ............. ... 5-1 5.2 Power Con sumption Me asurement S trap (JP5 ) ....................... ................ 5- 4 5.3 Ground Li n[...]

  • Page 5

    AT91EB42 Evaluation Boa rd User Guide 1-1 Section 1 Ov ervi ew 1.1 Scope The AT91 EB42 Evalua tion Boar d enables real-tim e code de velopment and evalu ation. It suppor ts the AT9 1M42800. This guide foc uses on the AT91EB42 Ev aluation Boar d as an evalua tion and demon- stratio n platform: Section 1 provides an ov er vi ew . Section 2 descr ibes[...]

  • Page 6

    Overview 1-2 AT91E B42 Evaluatio n Board User G uide 2 x 32-p in EBI expansion c onnectors 2 x 32-p in I/O expansion con nectors 20-pin JT AG interface connec tor If r equired , user- defined perip herals ca n also be adde d to t he boa rd. See Section 5 for details . Figure 1-1. AT91EB4 2 Evalu ation Boar d Block D iagram JTAG ICE Connector ARM7TD[...]

  • Page 7

    AT91EB42 Evaluation Boa rd User Guide 2-1 Section 2 Setting Up the AT91EB42 Evaluation Board 2.1 Elect rosta tic Warnin g The AT91EB42 Evaluation Board is shipped in protective anti-static packaging. The board mu st not be subjected to high e lectrostat ic potential s. A groun ding str ap or si milar prote ctive device should be worn w hen hand lin[...]

  • Page 8

    Setting Up the AT91EB42 Evaluation Boa rd 2-2 AT91E B42 Evaluatio n Board User G uide 2.4 Jumper S ettings JP1 is us ed to boot standar d or user program s. For st andard op eratio ns, set it in the STD position . JP8 is used to select the core power supp ly of the AT91M4280 0: 3.3V or 1.8V. F or oper- ation at 1. 8V, MCK fr equency s hall be limi [...]

  • Page 9

    AT91EB42 Evaluation Boa rd User Guide 3-1 Section 3 The On-board Software 3.1 AT91EB4 2 Evaluation Board The AT91EB42 Evaluat ion Board embeds an AT 49BV1604 Flash memor y device pro- grammed with default software. Only the lowest 8 x 8 KB sectors are used. The remaining sectors are user definable, and can be programmed using one of the Flash downl[...]

  • Page 10

    The On-board So ftware 3-2 AT91E B42 Evaluatio n Board User G uide 3.3 Programmed Def ault Me mor y Mapping Table 3 -1 defines t he mappin g defined b y the boot program. The boot software program, FTS and SRAM downloader are in sectors 1 and 2 of the Flash devic e. Sectors 2 to 8 support the Ang el Debug Monitor. Sector 24 at addres s 0x0110 00 00[...]

  • Page 11

    AT91EB42 Evaluation Boa rd User Guide 4-1 Section 4 Circuit Description 4.1 AT91M 42800 Processor Figure 6-1 on page 6-2 show s the AT9 1M42800 . The foot print is for a 14 4-pin TQFP package . Strap CB 20 enables the user to choo se between the standard I CE debu g mode and th e JTAG bou ndary sc an mode of o peration . The operat ing mo de is def[...]

  • Page 12

    Circuit Desc ription 4-2 AT91E B42 Evaluatio n Board User G uide 4.3 Me mories The sc hematic ( Figure 6-3 on page 6-4 in Sec tion 6, “ Appendix B – Schemati cs ” ) shows one AT49 BV1604 2 MB 16 -bit Flash, o ne AT45DB321 4 MB serial D ataFlash, one AT24C512 64 KB EEPR OM, one AT252 56 32 KB EEPROM and two 1 28K/512K x 8 SRAM devic es. Note: [...]

  • Page 13

    Circuit Description AT91EB42 Evaluation Boa rd User Guide 4-3 of watchdog time-out as the pin NWDOV F of the AT9 1M42800 is c onnected to i ts input MR . The asser tion of this rese t signal wil l light up the red RE SET LED (D10). B y pressing the CLEAR RES ET push b utton (S1), the LED ca n be turned of f. Anothe r supervisor y circuit ini tializ[...]

  • Page 14

    Circuit Desc ription 4-4 AT91E B42 Evaluatio n Board User G uide[...]

  • Page 15

    AT91EB42 Evaluation Boa rd User Guide 5-1 Section 5 Appendix A – Configuration Straps 5.1 Configuration Strap s (CB1 - 23, JP1 - 8) By addi ng the I/O an d EBI ex pansion connector s, users can con nect their own peripher- als to the ev aluation boa rd. These peri pherals may re quire more I/O lines than ava ilable while the board is i n its def [...]

  • Page 16

    Appendix A – Configuration Stra ps 5-2 AT91E B42 Evaluatio n Board User G uide CB7 Standar d P o wer Supply Supervisory Ena bling Clos ed (1) Standard po wer sup ply is sup erv ise d by the ADC (U20) ch annel 2 v ia a resisto r bridge . The rat io is set to 0.1485 so that th e standard powe r supply can be s upervised up to 15 V . Open Standard p[...]

  • Page 17

    Appendix A – Configuration Straps AT91EB42 Evaluation Boa rd User Guide 5-3 CB15 Serial DataFlash Enabling Clos ed (1) A T91 NPCSA0 se lect sig nal is conn ected to t he serial DataF lash memory . Open A T9 1 NPCSA0 se lect signal is not c onnected to the serial DataFlash memory . This authoriz es users to c onnect th e correspond ing PIO to thei[...]

  • Page 18

    Appendix A – Configuration Stra ps 5-4 AT91E B42 Evaluatio n Board User G uide Note: 1. Hardwired def ault pos ition: T o cancel this def ault config urati on, cut th e wire on the board. 5.2 Powe r Consumption Measurem ent Strap (JP5) The JP5 stra p enables connection of an ammeter to measure th e AT91M428 00 global cons umptio n (V DDCORE and V[...]

  • Page 19

    AT91EB42 Evaluation Boa rd User Guide 6-1 Section 6 Appendix B – Sche matics 6.1 Schema tics The foll owing sc hematics a re appended: • Figure 6-1. PCB Lay out • Figure 6- 2. A T91EB42 Blocks Overv iew • Figure 6- 3. EBI Me mories • Figure 6- 4. I/O and E BI Expansi on Connec tors • Figure 6- 5. Push Buttons, LEDs an d Ser ial Interfac[...]

  • Page 20

    Appendix B – Schemati cs 6-2 AT91E B42 Evaluatio n Board User G uide Figure 6-1. PCB Lay out[...]

  • Page 21

    Appendix B – Schematics AT91EB42 Evaluation Boa rd User Guide 6-3 Figure 6-2. AT91EB4 2 Blocks Overview INP UT / OUT PU T ON BO ARD Serial Connectors / P. B. / LED PB[6..15] PA [6..7] PA0 PA [9..10] PB21 SUPPLY and RTC SAVE pow er supply / ba tt er y PB18 SERIAL M E MO R I ES SERIAL MEM ORIES PB17 MOSIA MISOA SPCKA PB16 NRS T NPC S A0 NPC S A1 VI[...]

  • Page 22

    Appendix B – Schemati cs 6-4 AT91E B42 Evaluatio n Board User G uide Figure 6-3. EBI M emori es VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 512k 512k 128k 128k 128k 512k 512k 128k layout for TSSOP 400mil. layout for SOJ 400mil. 2Mbytes FLASH MEMORY 1Mbytes ( two 512kX8 ) S[...]

  • Page 23

    Appendix B – Schematics AT91EB42 Evaluation Boa rd User Guide 6-5 Figure 6-4. I/O and EBI Expans ion Connectors[...]

  • Page 24

    Appendix B – Schemati cs 6-6 AT91E B42 Evaluatio n Board User G uide Figure 6-5. Push Butto ns, LEDs and Serial Int erface VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 Usart 0: SERIAL A Usart 1: SERIAL B VALID RS232 on[...]

  • Page 25

    Appendix B – Schematics AT91EB42 Evaluation Boa rd User Guide 6-7 Figure 6-6. AT91M428 00 VDDCORE VDDPLL VCC3V3 VCC3V3 VCC3V3 VDDIO VDDIO VDDCORE JTAG[0..4] NRST NWDOVF JTAGSEL Guard ring PLL filter A PLL filter B Guard ring Default boot Mode : 16 Bits VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO JTAG[0..4] JTAG0 JTAG2 JTAG1 JTAG3 JTAG4 JTAGSEL NWDOVF PLL[...]

  • Page 26

    Appendix B – Schemati cs 6-8 AT91E B42 Evaluatio n Board User G uide Figure 6-7. Reset an d JTAG Inter face VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 NRST JTAG[0..4] JTAGSEL NWDOVF RESET RESET ICE IEEE 3V3 SUPPLY CLEAR RST LED RSTLED RSTLED RSTLED JTAG0 JTAG1 JTAG2 JTAG4 JTAG3 NRST G1 G2 G3 G4 G5 JTAG0 JTAG1 JTAG2 JTAG3 JTAG4 NRST N[...]

  • Page 27

    Appendix B – Schematics AT91EB42 Evaluation Boa rd User Guide 6-9 Figure 6-8. Power Sup ply and B attery Char ger VCC3V3 VDDCORE VDDIO VDDPLL VCC3V3 Vbatt+ Vps VDDCORE=1.8V VDDCORE=3.3V I Vddcore I Vddio 5 cel. NiCd Timeout 264mn TC in place only if Therm sensor on Batt. is not use. 2R5 / 1W VCC3V3 VINplug1 VCC1V8 VDDIO VIN1F VINplug2 VIN_1 VIN V[...]

  • Page 28

    Appendix B – Schemati cs 6-10 AT91E B42 Evaluatio n Board User G uide Figure 6-9. Battery Ty pe and Conn ection T˚C Battery : 6V / 300mAH NiCd SAFT : VRE 1/2 AA Ref 139 663 Wire: gauge 20 AWG Wire: gauge 20 AWG Tmax 45˚C BT1 6V / 300mAH 1 2 J2 con. fem. 43025-0400+43030-0007 MOLEX 1 2 3 4 R61 10K CTN SIEMENS B57861S103F40[...]

  • Page 29

    Appendix B – Schematics AT91EB42 Evaluation Boa rd User Guide 6-11 Figure 6-10. SPI Me mories, I 2 C Memorie s and SPI AD C VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 VCC3V3 Vbatt+ Vps VCC3V3 VCC3V3 VCC3V3 VCC3V3 Data Flash Memory Serial EEPROM memory on PIO Serial EEPROM memory on SPIA A/D converter on SPIA SCL1 SCL NP[...]

  • Page 30

    © Atmel Corpor ation 2000. Atmel Corporati on makes no w arranty f o r the use of its produ cts, othe r than those e xpr essly contained in the Company ’ s standard war- ranty wh ich is detail ed in Atmel ’ s T erms and Conditi ons located on t he Company ’ s w eb site. The C ompany assumes no respon sibility f or any errors which ma y appea[...]