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AMD HYPERTRANSPORT 8151 manual

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Table of contents for the manual

  • Page 1

    AMD-8151™ HyperT ranspor t™ A GP3.0 Graphics T unnel Re vision Guide 25912 Publication # 3.06 Revision: March 2006 Issue Date:[...]

  • Page 2

    © 2003–2006 Advanced Mi cro Devices, Inc. All rights reserved. The contents of this document are provided in connection with Advanced Micro De vices, Inc. (“ AMD”) products . AMD makes no represen tations or warranties with respect to the accuracy or completeness of the contents of this publication and reserv es the right to make changes to [...]

  • Page 3

    Revision History 3 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 Re vision History Date Revision Description March 20 06 3.06 Added erratum #28. A ugust 2004 3.04 A dded err atum #27. June 2003 3.00 Initial pub lic release.[...]

  • Page 4

    4 Revision History 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics T unnel Revision Guide[...]

  • Page 5

    5 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide AMD-8151™ HyperT ranspor t™ A GP3.0 Graphics T unnel Re vision Guide The purpose of the AMD-8151™ HyperT ransport™ AGP3.0 Graphics T unnel Revision Guide is to communicate updated produc t information on the AMD-8151™ Hype rT ransport™ [...]

  • Page 6

    6 Revision Determination 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide Re vision Determination The BIOS checks the PCI re vision ID re gister at De vA:0x08 to determine the version of silicon as sho wn in T able 1. T able 1. AMD-8151™ HyperT ranspor t™ A GP3.0 Graphics T unnel Revision IDs Seq[...]

  • Page 7

    Pr oduct Errata 7 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 Pr oduct Errata This section documents AMD-8151™ HyperT ranspor t™ A GP3.0 graphics tunnel product errata. A unique tracking number for each erratum has been assigned within this document for user con venience in trackin g the e[...]

  • Page 8

    8 Pr oduct Errata 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide 22 Incorrect V alue For DevA :0xA4[Host translation#] Description De vA:0xA4[Host translation#] is a r ead-only bit, fix ed in the high stat e in the graphics tunnel. Per the A GP specification, this indicates th at core logic does no[...]

  • Page 9

    Pr oduct Errata 9 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 23 Link Electrical Issue Wh en Operating At 800 MHz Description The graphics tunnel A-si de link may not operate properly at 800 MHz. P otential Effect on System T ransfer of erroneous data and system deadlocks are possible. Suggest[...]

  • Page 10

    10 Pr oduct Errata 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide 24 Deadloc k Scenario With P eer-T o-P eer T raffic Description Some PCI cards generate peer-to- peer posted-write traf fic tar geti ng the A GP bridge (from the PCI bus, through the graphics tunnel, to the host, b ack to the graphic[...]

  • Page 11

    Pr oduct Errata 11 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 25 Input Leakage P arameter Out Of Spec Description When operating with A GP2.0 signaling, the input leakage current (I LI ) is specified to be limited to less than ±10 µ A. Ho we ver , input leakage cu rrent may be as much as ±[...]

  • Page 12

    12 Pr oduct Errata 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide 26 DevB:0x00[De vID] Is Read Only Description The four LSBs of De vB:0x00[De vID] should be "write once". Ho we ve r , they are "read only" instead. P otential Effect on System A generic graphics dri ver may be lo[...]

  • Page 13

    Pr oduct Errata 13 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 27 F ailure When B-Side Link Is Directed T owar d The Host Description The AMD-8151 does not m aster abort a transaction with the HyperT ransport CO MP A T bit set if all of the follo wing conditions apply: • HyperT ransport link[...]

  • Page 14

    14 Pr oduct Errata 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide 28 The AMD-8151™ T unnel Lacks Extended Configuration Space Memory-Mapped I/O Base Address Register Description Current AMD processors do not nati ve ly support PCI-def ined e xtended conf iguration space. A memory-mapped I/O base [...]

  • Page 15

    Documentation Support 15 AMD-8151™ HyperT ransport ™ AGP3.0 Graphics T unnel Revision Guide 25912 Rev . 3.06 Mar ch 2006 Documentation Suppor t The follo wing documents provide additional information re garding the operation of th e AMD-8151™ HyperT ransport™ A GP3.0 graphics tunnel: • AMD-8151™ HyperT ransport™ AGP3.0 Graphics T unne[...]

  • Page 16

    16 Documentation Support 25912 Rev . 3.06 Mar ch 2006 AMD-8151™ HyperT ransport™ AGP3.0 Graphics Tunnel Revision Guide[...]