Acer 61X manual

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Table of contents for the manual

  • Page 1

    TI Extensa 61X Series ( AcerNote 370P) Notebook Service Guide PART NO.: 2238309-0809 DOC. NO.: PRINTED IN USA[...]

  • Page 2

    ii Copyright Copyright © 1997 by Acer Incorporated. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical, manual or otherwise, without the prio[...]

  • Page 3

    iii About this Manual Purpose This service guide contains reference information for the Extensa 610 notebook computer. It gives the system and peripheral specifications, shows how to identify and solve system problems and explains the procedure for removing and replacing system components. It also gives information for ordering spare parts. Manual [...]

  • Page 4

    iv Appendix E BIOS POST Checkpoints This appendix lists all the BIOS POST checkpoints. Appendix F Technical Bulletins and Updates This appendix reserves a space for technical bulletins and future updates. Appendix G Forms This appendix contains standard forms that can help improve customer service. Related product information AcerNote 370P User&apo[...]

  • Page 5

    v Conventions The following are the conventions used in this manual: Text entered by user Represents text input by the user. Screen messages Denotes actual messages that appear onscreen. NOTE Gives bits and pieces of additional information related to the current topic. WARNING Alerts you to any damage that might result from doing or not doing speci[...]

  • Page 6

    vi[...]

  • Page 7

    vii Table of Contents Chapter 1 System Introduction 1.1 Overview .......................................................................................................................... 1-1 1.1.1 Features ........................................................................................................... 1-2 1.1.2 Rear Ports ..............[...]

  • Page 8

    viii 1.4.17 Keyboard ........................................................................................................ 1-23 1.4.17.1 Windows 95 Keys ........................................................................ 1-23 1.4.18 FDD .........................................................................................................[...]

  • Page 9

    ix 2.4 ALI M7101 (Power Management Unit) .......................................................................... 2-24 2.4.1 Features ......................................................................................................... 2-24 2.4.2 Pin Diagram .....................................................................................[...]

  • Page 10

    x 2.9.5 Pin Diagram ................................................................................................... 2-94 2.9.6 Pin Description ............................................................................................... 2-95 2.9.7 Functions Description ..........................................................................[...]

  • Page 11

    xi 3.4 System Security ................................................................................................................ 3-6 3.4.1 Floppy Disk Drive Control ............................................................................... 3-6 3.4.2 Hard Disk Drive Control ................................................................[...]

  • Page 12

    xii 4.5 Disassembling the Inside Frame Assembly ..................................................................... 4-10 4.5.1 Removing the Heat Sink Assembly ................................................................. 4-10 4.5.2 Removing the Internal Drive .......................................................................... 4-11 4.5.[...]

  • Page 13

    xiii List of Figures 1-1 Notebook .......................................................................................................................... 1-1 1-2 Rear Po rts ........................................................................................................................ 1-3 1-3 Indicator Light ............................[...]

  • Page 14

    xiv 2-14 PCI-to-CardBus terminal assignments ............................................................................ 2-62 2-15 NS87336VJG Block Diagram ......................................................................................... 2-77 2-16 NS87336VJG Pin Diagram ......................................................................[...]

  • Page 15

    xv 4-20 Removing the Battery Connector Board .......................................................................... 4-18 4-21 Unplugging the LCD Cover Switch and Speaker Cables ................................................. 4-18 4-22 Removing the Charger Board ..................................................................................[...]

  • Page 16

    xvi List of Tables 1-1 Port Descriptions ............................................................................................................. 1-3 1-2 Indicator Status Descriptions ............................................................................................ 1-4 1-3 System Specifications ......................................[...]

  • Page 17

    xvii 1-28 CD-ROM S pecifications ................................................................................................. 1-25 1-29 Battery Specifications ..................................................................................................... 1-25 1-30 Charger Specifications ...................................................[...]

  • Page 18

    xviii 2-14 NS87336VJG Pin Descriptions ....................................................................................... 2-79 2-15 YMF715 Descriptions ..................................................................................................... 2-89 2-16 T62.062.C Absolute Maximum Ratings Table ........................................[...]

  • Page 19

    C h a p t e r 1 C h a p t e r 1 System Introduction System Introduction 1- 1 This chapter introduces the notebook, its features, components and specifications. 1.1 Overview The notebook was designed with the user in mind. The figure below shows the notebook with the display open. Figure 1-1 Notebook[...]

  • Page 20

    1- 2 Service Guide 1.1.1 Features Here are just a few of the notebook’s many features: Performance • High-end Pentium microprocessor • Support 64-bit main memory and external (L2) cache memory • Large LCD display (DualScan STN and TFT active matrix.) • PCI local bus video with graphics acceleration and 1MB video RAM boost video performanc[...]

  • Page 21

    System Introduction 1- 3 1.1.2 Rear Ports 1 DC-in Port 6 Serial Port 2 Microphone-in Port 7 Parallel Port 3 Lin e-in Port 8 External CRT Port 4 Line-out Port 9 PS/2 Port 5 External Floppy Drive Connector Figure 1-2 Rear Ports The following table describes these ports. Table 1-1 Port Descriptions # Icon Port Connects to... 1 DC-in Port AC adapter an[...]

  • Page 22

    1- 4 Service Guide Figure 1-3 Indicator Light This two-way indicator light allows you to see the notebook status when the display is open or closed. The indicator serves both as a power and battery-charging indicator. See Table 1-2. Table 1-2 Indicator Status Descriptions Indicator Status Power Switch Condition Green On Charged battery is installed[...]

  • Page 23

    System Introduction 1- 5 1.1.4 System Specifications Overview Table 1-3 System Specifications Item Standard Optional Microprocessor Intel Pentium™ processor (Intel P54CSLM 120/133/150 MHz) Intel P55CLM - 133/150 with MMX System memory 8MB / 16MB Dual 64-bit memory banks Expandable to 64MB using 8, 16 and 32MB soDIMMs Flash ROM BIOS 256KB Data sto[...]

  • Page 24

    1- 6 Service Guide Table 1-3 System Specifications (continued) Item Standard Optional I/O ports (continued) One 3.5mm minijack mic-in port One 3.5mm minijack line-in port One 3.5mm minijack line-out port Microphone Audio CD player or other line-in devices Speakers or headphones Operating system Windows 95 Windows 3.1 Weight FDD model CD-ROM model ([...]

  • Page 25

    System Introduction 1- 7 1.2 System Board Layout 1.2.1 Main Board (PCB No: 96149-SC) Figure 1-4 Main Board Layout (Top Side) Note: This switch setting is not for Extensa 610 use.[...]

  • Page 26

    1- 8 Service Guide Figure 1-5 Main Board Layout (Bottom Side)[...]

  • Page 27

    System Introduction 1- 9 1.2.2 Audio Connection Board (PCB No:96467-1) Figure 1-6 Audio Connection Board Layout (Top Side) 1.2.3 Battery Connection Board (PCB No:95498-1) Figure 1-7 Battery Connection Board Layout (Top Side) Figure 1-8 Battery Connection Board Layout (Bottom Side)[...]

  • Page 28

    1- 10 Service Guide 1.2.4 HDD Connection Board (PCB No:96463-1) Figure 1-9 HDD Connection Board Layout (Top Side) Figure 1-10 HDD Connection Board Layout (Bottom Side)[...]

  • Page 29

    System Introduction 1- 11 1.2.5 Keyboard Connection Board (PCB No: 96465-1) Figure 1-11 Keyboard Connection Board Layout (Top Side) Figure 1-12 Keyboard Connection Board Layout (Bottom Side)[...]

  • Page 30

    1- 12 Service Guide 1.3 Jumpers and Connectors CN1 CN6 CN2 CN7 CN3 CN8 CN9 CN4 CN10 CN5 CN11 CN12 CN14 CN17 CN18 CN19 SW2 SW3 CN13 CN15 CN16 S1 CN1 External PS/2 keyboard/mouse port CN12 Audio Board Connector CN2 VG A port CN13 PCMCIA socket connector CN3 Parallel port CN14 Diskette Drive connector CN4 Serial port CN15 HDD Connector CN5 External fl[...]

  • Page 31

    System Introduction 1- 13 Table 1-4 CPU Voltage (S1) Settings CPU Voltage 2.35V 2.45V 2.9V 3.1V Switch 1 Off Off Off Off Switch 2 Off On Off Off Switch 3 On Off Off Off Switch 4 Off Off Off On Table 1-5 CPU Speed (SW3) Settings CPU Speed 120MHz 133MHz 150MHz Switch 1 Off On Off Switch 2 On Off On Switch 3 Off Off On Switch 4 On On On Table 1-6 Mult[...]

  • Page 32

    1- 14 Service Guide 1.4 Hardware Configuration and Specification 1.4.1 Memory Address Map Table 1-7 Memory Address Map Address Range Definition Function 000000 - 09FFFF 640 KB memory Base memory 0A0000 - 0BFFFF 128 KB video RAM Reserved for graphics display buffer 0C0000 - 0CBFFF Video BIOS Video BIOS 0E0000 - 0EFFFF 0F0000 - 0FFFFF 128 KB system B[...]

  • Page 33

    System Introduction 1- 15 1 1 1 2 2 2 2 1 2 3 4 5 6 7 0083 0081 0082 Cascade 008B 0089 008A Audio Diskette Audio (option)/ECP(option) Cascade - Spare - 1.4.4 I/O Address Map Table 1-10 I/O Address Map Address Range Device 000 - 00F 020 - 021 040 - 043 048 - 04B 060 - 064 070 - 071 080 - 08F 0A0 - 0A1 0C0 - 0DF 170 - 177 178, 17A 1F0 - 1F7 3F6, 3F7 [...]

  • Page 34

    1- 16 Service Guide 1.4.5 M7101 GPIO (General Purpose I/O) Port Definition Table 1-11 M7101 GPIO Port Definition Item Description GPIOA2 Smart inverter contrast counter control GPIOA3 0: Normal operation of system 1: Shutdown system GPIOA4 Serial data on X24C02 GPIOA5 Battery gauge communication control GPIOA6 Battery data line GPIOA7 Thermal senso[...]

  • Page 35

    System Introduction 1- 17 Item Specification BIOS vendor Acer BIOS version v2.1 BIOS in flash EPROM (Y/N) Yes BIOS ROM size 256KB BIOS package type 32-pin TSOP Same BIOS for STN color/TFT color (Y/N) Yes The BIOS can be overwritten/upgradeable using the “AFLASH” utility (AFLASH.EXE). Please refer to software specification section for details. 1[...]

  • Page 36

    1- 18 Service Guide The following table lists all possible memory configurations. Table 1-14 Memory Configurations Slot 1 Slot 2 Total Memory 8 MB 0 MB 8 MB 0 MB 8 MB 8 MB 8 MB 8 MB 16 MB 16 MB 0 MB 16 MB 0 MB 16 MB 16 MB 16 MB 8 MB 24 MB 8 MB 16 MB 24 MB 16 MB 16 MB 32 MB 32 MB 0 MB 32 MB 0 MB 32 MB 32 MB 32 MB 8 MB 40 MB 8 MB 32 MB 40 MB 32 MB 16[...]

  • Page 37

    System Introduction 1- 19 1.4.10 Video Memory Table 1-15 Video RAM Configuration Item Specification DRAM or VRAM DRAM(EDO type) Fixed or upgradeable Fixed Memory size/configuration 1MB (256K x 16 x 2pcs) Memory speed 60ns Memory voltage 3.3V Memory package TSOP 1.4.11 Video Table 1-16 Video Hardware Specification Item Specification Video chip C&[...]

  • Page 38

    1- 20 Service Guide 1280x1024x16 86I 60 Y Y 1.4.11.2 LCD Resolution Support Table 1-18 Supported LCD Resolutions Resolution x Color on LCD Only TFT LCD (SVGA) STN LCD (SVGA) 640x480x16 Y Y 640x480x256 Y Y 640x480x65,536 Y Y 640x480x16,777,216 Y - 800x600x16 Y Y 800x600x256 Y Y 800x600x65,536 Y - 1024x768x16 Y Y 1024x768x256 Y Y • DSTN color numbe[...]

  • Page 39

    System Introduction 1- 21 1.4.12 Parallel Port Table 1-19 Parallel Port Configurations Item Specification Number of parallel ports 1 ECP/EPP support Yes (set by BIOS setup) Connector type 25-pin D-type Location Rear side Selectable parallel port (by BIOS Setup) • Parallel 1 (3BCh, IRQ7) • Parallel 2 (378h, IRQ7) • Parallel 3 (278h, IRQ5) • [...]

  • Page 40

    1- 22 Service Guide 1.4.14 Audio Table 1-21 Audio Specifications Item Specification Chipset YMF715 Audio onboard or optional Built-in Mono or stereo Stereo Resolution 16-bit Compatibility SB-16 , Windows Sound System Mixed sound sources Voice, Synthesizer, Line-in, Microphone, CD Voice channel 8-/16-bit, mono/stereo Sampling rate 44.1 kHz Internal [...]

  • Page 41

    System Introduction 1- 23 1.4.16 Touchpad Table 1-23 Touchpad Specifications Item Specification Vendor & model name Synaptics TM1002MPU Power supply voltage (V) 5 ± 10% Location Palm-rest center Internal & external pointing device work simultaneously Yes Support external pointing device hot plug Yes X/Y position resolution (points/mm) 20 I[...]

  • Page 42

    1- 24 Service Guide 1.4.18 FDD Table 1-26 FDD Specifications Item Specification Vendor & model name Mitsumi D353F2 Floppy Disk Specifications Media recognition 2DD (720K) 2HD (1.2M, 3-mode) 2HD (1.44M) Sectors / track 9 15 18 Tracks 80 80 80 Data transfer rate (Kbits/s) 250 300 500 500 Rotational speed (RPM) 300 360 360 300 Read/write heads 2 E[...]

  • Page 43

    System Introduction 1- 25 Item Specification Performance Specifications Data transfer rate (host-buffer, Mbytes/s) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) 16.6 (max., PIO mode 4) DC Power Requirements Voltage tolerance (V) 5 ± 5% 5 + 5%, -10% 5 ± 5% 5 ± 5% 1.4.20 CD-ROM Table 1-28 CD-ROM Specifications Item Specif[...]

  • Page 44

    1- 26 Service Guide 1.4.22 Charger To charge the battery, place the battery pack inside the battery compartment and plug the AC adapter into the notebook and an electrical outlet. The adapter has three charging modes: • Rapid mode The notebook uses rapid charging when power is turned off and a powered AC adapter is connected to it. In rapid mode,[...]

  • Page 45

    System Introduction 1- 27 Item Specification Vendor & model name Ambit T62.061.C.00 Input voltage ( Vdc) 8~21 Output Rating 5V 3.3V 2.9V (2.35/2.45/2.9/3.1V) +12V +6V 5VSB Current (w/ load, A) 0~3.2 0~3.3 0~3.0 0~0.15 0~0.1 0.005 Voltage ripple (max., mV) 75 75 50 100 300 75 Voltage noise (max., mV) 100 100 100 200 500 100 OVP (Over Voltage Pro[...]

  • Page 46

    1- 28 Service Guide 1.4.25 LCD Table 1-33 LCD Specifications Item Specification Vendor & model name HITACHI LMG9900ZWCC TORiSAN LM-FH53-22NAW IBM ITSV45E GOLDSTAR LP121S1-J Mechanical Specifications LCD display area (diagonal, inch) 11.3 11.3 11.3 12.1 Display technology STN STN TFT TFT Resolution SVGA (800x600) VGA (800x600) SVGA (800x600) SVG[...]

  • Page 47

    System Introduction 1- 29 1.4.26 AC Adapter Table 1-34 AC Adapter Specifications Item Specification Vendor & model name Delta ADP-45GB REV.E2 Input Requirements Nominal voltages (Vrms) 90 - 264 Frequency variation range (Hz) 47 - 63 Maximum input current (A, @90Vac, full load) 1.5 A Inrush current The maximum inrush current will be less than 50[...]

  • Page 48

    1- 30 Service Guide 1.5 Software Configuration and Spe cification 1.5.1 BIOS The BIOS is compliant to PCI v2.1, APM v1.2, E-IDE and PnP specification. It also defines the hotkey functions and controls the system power-saving flow. 1.5.1.1 Keyboard Hotkey Definition The notebook supports the following hotkeys. Table 1-35 Hotkey Descriptions Hotkey I[...]

  • Page 49

    System Introduction 1- 31 1.5.1.3 Power Management Figure 1-14 Power Management Block Diagram[...]

  • Page 50

    1- 32 Service Guide ON MODE Normal full-on operation STANDBY MODE The notebook consumes very low power in standby mode. Data remain intact in the system memory until battery is drained. The necessary condition for the notebook to enter standby mode is that the reserved disk space size for saving system and video memory is insufficient so the notebo[...]

  • Page 51

    System Introduction 1- 33 A necessary condition for the notebook to enter hibernation mode is that the reserved space for saving system information on the hard disk must be larger than the combined system and video memory size. Under such conditions, the standby/hibernation hotkey acts as the hibernation hotkey. See the user’s manual for informat[...]

  • Page 52

    1- 34 Service Guide Table 1-37 Hibernation Mode Conditions and Descriptions Condition Description The condition to enter Hibernation Mode • “Hard Disk Drive” is not [Disabled] in System Security of BIOS SETUP. • “Hard Disk 0” is not [None] in Basic System Configuration of BIOS SETUP. • HDD has already located enough free contiguous di[...]

  • Page 53

    System Introduction 1- 35 Table 1-39 Hard Disk Standby Mode Conditions and Descriptions Condition Description The condition to enter HDD Standby Mode • Display Standby Timer times-out or LCD cover is closed. The condition of HDD Standby Mode • All the system components are on except HDD spindle motor The condition back to On Mode • Any access[...]

  • Page 54

    1- 36 Service Guide 1.5.2 Drivers, Applications and Utilities The notebook comes preloaded with the following software: • Windows 95 2 • System utilities and application software 3 • Sleeper manager utility • Touchpad driver • Display drivers • Audio drivers • PC Card slot drivers and applications • Other third-party application sof[...]

  • Page 55

    System Introduction 1- 37 1.6 System Block Diagram Figure 1-15 System Block Diagram[...]

  • Page 56

    1- 38 Service Guide 1.7 Environmental Requirements Table 1-42 Environmental Requirements Item Specification Temperature Operating (ºC) +5 ° C ~ +35 ° C Non-operating( ºC) -20 ° C ~ +60 ° C Humidity Operating (non-condensing) 20% ~ 80% Non-operating (non-condensing) 20% ~ 80% Operating Vibration (unpacked) Operating 5 - 25.6Hz, 0.38mm; 25.6 - [...]

  • Page 57

    System Introduction 1- 39 1.8 Mechanical Specifications Table 1-43 Mechanical Specifications Item Specification Weight FDD model CD-ROM model (includes battery) 2.6 kg. (5.7 lb.) 2.8 kg. (6.2 lb.) Dimensions (main footprint) W x D x H 306mm x 228mm x 46mm (12.05” x 8.98” x 1.81”)[...]

  • Page 58

    C h a p t e r 2 C h a p t e r 2 Major Chips Description Major Chips Description 2- 1 This chapter discusses the major chips used in the notebook. 2.1 Major Component List Table 2-1 Major Chips List Component Vendor Description M1521 Acer System data buffer M1523 Acer System controller chip M7101 Acer Power management unit 65550 C&T (Chips &[...]

  • Page 59

    2- 2 Service Guide 2.2 ALI M1521 The ALADDIN-III consists of two chips, ALI M1521 and M1523 to give a 586 class system the complete solution with the most up-to-date feature and architecture for the new multimedia/multithreading operating system. It utilizes the BGA package to improve the AC characterization, resolves system bottleneck and make the[...]

  • Page 60

    Major Chips Description 2- 3 • UMA (unified memory architecture) • Dedicated UMA arbiter pins • Supports several protocols from major graphics vendors • SFB size : 512KB/1MB/2MB/3MB/4MB • CPU could access frame buffer memory through system memory controller • Alias address for frame buffer memory • Fully synchronous 25/30/33 MHz 5V PC[...]

  • Page 61

    2- 4 Service Guide 2.2.2 Block Diagram 586 CPU SRAM M1521 BGA DRAM HDD M1523 UMA Graphic controller IDE Master Aladdin III System Block Diagram CD CPU Bus PCI Bus ISA Bus USB connector Figure 2-1 Alladin III Block Diagram[...]

  • Page 62

    Major Chips Description 2- 5 2.2.3 System Architecture M1521 M1523 ALADDIN-III SYSTEM ARCHITECTURE tag 8/11-bit TTL SRAM 208-PQFP/RTC/KBC 328-BGA 586 CPU addr data PCI ISA DRAM MD GC MA CTLR IDE bus HDD 128K/256K Flash XD - TTL USB conn Figure 2-2 Alladin III System Architecture[...]

  • Page 63

    2- 6 Service Guide 2.2.4 Data Path E C C 64-bit SWAP HD_ OUT 64-bit SWAP 6 DWORD 5 DWORD 6 DWORD MUX PCI_OUT PCI_IN P_IN[31:0] PB_OUT[63:0] 64-bit HDIN[63:0] MUX 72-bit ECC 72-bit SWAP 8 QWORD MUX MUX MUX MDIN[63:0] PCI_IN MD_IN[63:0] PB_IN[63:0] HD_IN SWAP H/L DW swap for 32-bit DRAM MD_OUT M1521 MD_IN ECC partial W-R path Figure 2-3 M1521 Data Pa[...]

  • Page 64

    Major Chips Description 2- 7 2.2.5 Pin Diagram Figure 2-4 M1521 Pin Diagram[...]

  • Page 65

    2- 8 Service Guide 2.2.6 Signal Descriptions Table 2-2 M1521 Signal Descriptions Signal Pin Type Description Host Interface A[31:29] A[28:26] A[25:23] A[22:20] A[19:17] A[16:14] A[13:11] A[10:08] A[07:05] A[04:03] W8, W11, U11, Y10, Y9, V10, W9, W10, U9, U10, V9, U5, V5, W5, Y5, U6, W6, V6, Y6, U7, W7, Y7, V7, V8, Y8, Y12, U8, Y11, V11 I/O Host Add[...]

  • Page 66

    Major Chips Description 2- 9 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description Host Interface M/IOJ H5 I Host Memory or I/O. This bus definition pin indicates the current bus cycle is either memory or input/ output. D/CJ T7 I Host Data or Code. This bus definition pin is used to distinguish data access cycles from code acc[...]

  • Page 67

    2- 10 Service Guide Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description DRAM Interface RASJ[6] / SCASJ[0] M16 O Row Address Strobe 6, or Synchronous DRAM CAS 0 (FPM/EDO/BEDO) of DRAM bank 6. SDRAM column address strobe (SDRAM) copy 0. RASJ[5:0] / SCSJ[5:0] N17, M17, E16, F16, F17, G17 I/O Row Address Strobes or synchronous D[...]

  • Page 68

    Major Chips Description 2- 11 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description Secondary Cache Interface CCSJ/CB4 W16 O Synchronous SRAM chip select or Cache Address line 4 copy. This pin has two modes of operation depending on the type of SRAM selected via hardware strapping options or programming the CC register. GWEJ Y[...]

  • Page 69

    2- 12 Service Guide Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description TRDYJ E8 I/O Target Ready. This indicates the target is ready to complete the current data phase of transaction. STOPJ E11 I/O Stop. This indicates the target is requesting the master to stop the current transaction. LOCKJ E5 I/O Lock Resource Signal. Th[...]

  • Page 70

    Major Chips Description 2- 13 Table 2-2 M1521 Signal Descriptions (continued) Signal Pin Type Description UMA Interface MGNTJ/ GNTJ[4] F7 O Memory Grant. This output connects to the MGNTJ of the GUI device. This pin can also be used as grant signal of the fifth PCI master. PRIO G15 I Priority. The high priority request from the GUI device. Power Pi[...]

  • Page 71

    2- 14 Service Guide 2.3 ALI M1523 The M1523 is a bridge between PCI and ISA bus, providing full PCI and ISA compatible functions. The M1523 has Integrated System Peripherals (ISP) on-chip and provides advanced features in the DMA controller. This chip contains the keyboard controller, real-time clock and IDE master controller. This chip also suppor[...]

  • Page 72

    Major Chips Description 2- 15 • 32-bit addressability • Provides compatible DMA transfers • Provides type F transfers • Interrupt controller • Provides 14 interrupt channels • Independently programmable level/edge triggered channels • Counter/Timers • Provides 8254 compatible timers for system timer, refresh request, speaker output [...]

  • Page 73

    2- 16 Service Guide 2.3.2 Block Diagram M1523 Bl oc k Diagram DATA Buffer Control Address Buffer Decoder Clock & Reset PCI BUS Interface UNIT PCI Arbiter Interface ISA Interrupt UNIT PCI Interrupt UNIT CPU Interface USB Interface (reserved) PCI IDE Master Interface ISA BUS Interface UNIT DMA Refresh UNIT PMU or APIC Interface PS2/AT Keyboard Co[...]

  • Page 74

    Major Chips Description 2- 17 2.3.3 Pin Diagram VDD IRQ12 MSCLK KBDATA KBCLK/KBCSJ KBINH/IRQ1 IDESCS3J IDESCS1J IDEPCS3J IDEPCS1J IDE_A0 IDE_A2 IDE_A1 IDAKJ1 IDAKJ0 IDERDY IDEIORJ IDEIO WJ IDRQ1 IDRQ0 IDE_D0 IDE_D15 Vss IDE_D1 IDE_D14 IDE_D2 IDE_D13 IDE_D3 IDE_D12 IDE_D4 IDE_D11 IDE_D5 IDE_D10 IDE_D6 IDE_D9 IDE_D7 VDD IDE_D8 AD0 AD1 AD2 AD3 AD4 AD5[...]

  • Page 75

    2- 18 Service Guide 2.3.4 Signal Descriptions Table 2-3 M1523 Signal Descriptions Signal Pin Type Description Clock and Reset PWG 17 I Power-Good Input. This signal comes from the power supply to indicate that power is available and stable. CPURST 49 O CPU Reset includes cold and warm reset 3.3V signal (connected to CPU INIT) RSTDRV 57 O CPU Cold R[...]

  • Page 76

    Major Chips Description 2- 19 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description PCI Interrupt Unit INTAJ_MI 67 I PCI Interrupt Input A or PCI interrupt polling input. INTBJ 68 I/O PCI Interrupt Input B or polling select_0 output. INTCJ 69 I/O PCI Interrupt Input C or polling select_1 output. INTDJ 70 I/O PCI Interrupt Inpu[...]

  • Page 77

    2- 20 Service Guide Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description ISA Interface SA[16:0] 181, 185, 187, 188, 190, 192, 193, 195, 197, 199, 201, 203, 205, 207, 3, 4, 5 I/O ISA Slot Address Bus. These lines are addresses connected to slot address. SBHEJ 6 I/O ISA Slot Byte-high Enable. In a CPU or PCI master cycle, this [...]

  • Page 78

    Major Chips Description 2- 21 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description ISA Interface SMEMRJ / LMEGJ 176 O ISA System Memory Read. When the internal RTC is enabled, this signal indicates that the memory read cycle is for an address below 1 -MB address. Otherwise, this pin only indicates an address below 1M byte. SM[...]

  • Page 79

    2- 22 Service Guide Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description Miscellaneous MSCLK 154 O Mouse Clock Output when the internal KBC is enabled. RTC32KI 16 I RTC 32.768K Osc1. This is crystal input and requires an external 32.768khz quartz crystal. RTC32KII 15 I RTC 32.768K Osc2. This is crystal input and requires an e[...]

  • Page 80

    Major Chips Description 2- 23 Table 2-3 M1523 Signal Descriptions (continued) Signal Pin Type Description IDE Interface IDE_D[15:0] 135, 132, 130, 128, 126, 124, 122, 119, 121, 123, 125, 127, 129, 131, 133, 136 I/O IDE ATA Data Bus Vcc and Vss VCC3 53 P Vcc 3.3V VCC5/V BAT 14 P RTC Battery Input VCC5 40, 72, 105, 120, 156, 208 P VCC 5.0V(VDD) Vss 1[...]

  • Page 81

    2- 24 Service Guide 2.4 ALI M7101 (Power Management Unit) 2.4.1 Features • Four operating states - ON, DOZE, SLEEP, APM • Programmable DOZE and SLEEP timer • Programmable EL timer for backlight control • Two Programmable APM timers • Two output pins depending on operating state, each pin is programmable and power configurable • Provides[...]

  • Page 82

    Major Chips Description 2- 25 2.4.2 Pin Diagram Vss AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 CBEJ2 VDD5 FRAMEJ IRDYJ TRDYJ DEVSELJ PAR CBEJ1 SMIJ Vss AD15 AD14 AD13 AD12 AD11 AD10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 GPIOC3 GPIOC2 GPIOC1 GPIOC0 GPIOA7 GPIOA6 GPIOA5 GPIOA4 GPIOA3 GPIOA2 GPIOA1 GPIOA0 Vss CLK32 SEL1 SEL0 V[...]

  • Page 83

    2- 26 Service Guide 2.4.3 Pin Description Table 2-4 M7101 Pin Descri ptions Name No. Type Description PCI interface : (42) PCICLK 89 I PCI Clock. This is the PCI Bus interface CLK input signal. This clock frequency should not be more than 33 Mhz. It is used by internal PCI interface. AD[31:0] 91-98,2- 9, 20- 25, 27, 28, 30- 37 I/O PCI Address and D[...]

  • Page 84

    Major Chips Description 2- 27 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU Input event interface : (11) LBJ 47 I Low Battery. First stage battery low indication. If low is detected and Low Battery Timer is timeout, then battery low 1 SMIJ will be generated every programmed interval time until battery low 2 SMIJ is asse[...]

  • Page 85

    2- 28 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU Input event interface : (11) PS2 50 I External PS2 MOUSE. This signal represents whether the PS2 MOUSE is plugged in or not. When a PS2 MOUSE is plugged in, a high to low transition will generate a SMIJ. When a PS2 MOUSE is pulled out, a low to high trans[...]

  • Page 86

    Major Chips Description 2- 29 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description PMU output interface (9) CCFT 57 O Backlight control. This signal is used to turn on/off LCD backlight. FPVEE will AND with offset 0D2h D0 to generate CCFT. That is, if both FPVEE and offset 0D2h D0 are high then CCFT will be high or 1Khz signal wit[...]

  • Page 87

    2- 30 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA6 /SPEKIN (70) I Speak input. When offset 0F6h D6=‘1’, this pin will be speaker input. The input signal will xor with SPKCTL internally. GPIOA5 /GPIOWB (69) O External General Purpose I/O [...]

  • Page 88

    Major Chips Description 2- 31 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group A GPIOA0 /GPIORAJ (64) O External General Purpose I/O A read. When SPKCTL is pull low 4.7K, the GPIOA0 will become GPIORAJ. External General purpose A Read control pulse, When Read index 0E[...]

  • Page 89

    2- 32 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group B GPIOB3 /IN_BRDYJ (84) I BRDYJ Input. When DISPLAY is pulled low, this pin will be BRDYJ input. It must be connected to CPU. GPIOB2 /IN_INIT (83) I INIT Input. When DISPLAY is pulled low, this pin w[...]

  • Page 90

    Major Chips Description 2- 33 Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description General purpose I/O interface(24) General purpose I/O group C GPIOC5 /EXTSW (78) External suspend/resume switch. When offset 0F6h D10=0, this signal is GPIOC5. When D10=1, this signal will become EXTSW. External Suspend/Resume switch input. Pressing[...]

  • Page 91

    2- 34 Service Guide Table 2-4 M7101 Pin Descriptions (Continued) Name No. Type Description Power Pins VDD5 x 3 11,59,76 P 5V VDD input VDD3 x 2 26,100 P 3.3V VDD input VDDS x 1 46 P 5V Suspend VDD input. This pin supplies to RI, RTC, HOTKEYJ, COVSW, SUSTATE, PWGD, SUSRSTJ pad. VSS x 5 1,19,38, 63,90 P VSS Ground. 2.4.4 Different Pin definition sett[...]

  • Page 92

    Major Chips Description 2- 35 When offset 0F6h, D5=1 and offset 0FBh, D7=1; GPIOB[7:0] and GPIOA[7:0] output some clocks for testing. The clocks are OTCOUNT, O16K, TCLK2, TCLK3, O128HZ, O16HZ, O8HZ, O4HZ, O2HZ, O1Hz, ELCOUNT, DZCOUNT, SLCOUNT, RICOUNT, LBCOUNT[1:0]. Table 2-6 M7101 Original Pin Definition Setting Original pin definition D6=1 D7=1 D[...]

  • Page 93

    2- 36 Service Guide 2.4.5 Numerical Pin List Table 2-7 M7101 Numerical Pin List No. Pin Name Type No. Pin Name Type 1 VSS P 51 CRT I 2 AD23 I/O 52 DRQ I 3 AD22 I/O 53 SLED O 4 AD21 I/O 54 SQWO O 5 AD20 I/O 55 SPKCTL O 6 AD19 I/O 56 FPVEE I 7 AD18 I/O 57 CCFT O 8 AD17 I/O 58 DISPLAY O 9 AD16 I/O 59 VDD5 P 10 CBEJ2 I 60 SEL0 I/O 11 VDD5 P 61 SEL1 I/O[...]

  • Page 94

    Major Chips Description 2- 37 2.4.6 Alphabetical Pin List Table 2-8 M7101 Alphabetical Pin List No. Pin Name Type No. Pin Name Type 49 ACPWR I 68 GPIOA4 I/O 37 AD0 I/O 69 GPIOA5 I/O 36 AD1 I/O 70 GPIOA6 I/O 35 AD2 I/O 71 GPIOA7 I/O 34 AD3 I/O 81 GPIOB0 I/O 33 AD4 I/O 82 GPIOB1 I/O 32 AD5 I/O 83 GPIOB2 I/O 31 AD6 I/O 84 GPIOB3 I/O 30 AD7 I/O 85 GPIO[...]

  • Page 95

    2- 38 Service Guide 2.4.7 Function Description The function blocks of M7101 are as follows : 1. PCI Interface 2. State Controller 3. Timer 4. Wake up event handler 5. Activity monitor 6. Battery monitor 7. General Purpose Input/Output (GPIO) 8. SMIJ Generator 9. SUSPEND monitor 10. APM monitor 11. Rundown Emulation 12. LCD control 13. SLOWDOWN cont[...]

  • Page 96

    Major Chips Description 2- 39 Table 2-9 M7101 PCI Interface Lock Register Action I/O Port 0178h/0078h I/O Port 017Ah/007Ah Lock Read not available except offset 0D1h not available except offset 0D1h Lock Write not available except offset 0D1h not available except offset 0D1h Unlock Read available available Unlock Write available available State Mac[...]

  • Page 97

    2- 40 Service Guide 2.5 C&T 65550 High Performance Flat Panel/CRT VGA Controller The C&T65550 of high performance multimedia flat panel / CRT GUI accelerators extend CHIPS’ offering of high performance flat panel controllers for full-featured note books and sub-notebooks. The C&T65550 offers 64-bit high performance and new hardware mu[...]

  • Page 98

    Major Chips Description 2- 41 The C&T65550 offers a variety of programmable features to optimize display quality. Vertical centering and stretching are provided for handling modes with less than 480 lines on 480-line panels. Horizontal and vertical stretching capabilities are also available for both text and graphics modes for optimal display o[...]

  • Page 99

    2- 42 Service Guide 2.5.3 Pin Diagram Figure 2-10 C&T 65550 Pin Diagram[...]

  • Page 100

    Major Chips Description 2- 43 2.5.4 Pin Descriptions Table 2-10 C&T 65550 Pin Descriptions Pin# Pin Name Type Description CPU Direct / VL-Bus Interface 207 RESET In Reset. For VL-Bus interfaces, connect to RESET#. For direct CPU local bus interfaces, connect to the system reset generated by the mother board system logic for all peripherals (not[...]

  • Page 101

    2- 44 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) 43 BE0# (BLE#) In Byte Enable 0. Indicates data transfer on D7:D0 for the current cycle. 32 BE1# In Byte Enable 1. Indicates data transfer on D15:D8 for the current cycle. 21 BE2# In Byte Enable 2. Indic[...]

  • Page 102

    Major Chips Description 2- 45 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description CPU Direct / VL-Bus Interface (continued) 51 50 49 48 47 46 45 44 41 40 38 37 36 35 34 33 20 19 18 17 16 15 14 13 8 7 6 5 4 3 2 1 D00 D01 D02 D03 D04 D05 D06 D07 D08 D09 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D[...]

  • Page 103

    2- 46 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 31 PAR I/O Parity. This signal is used to maintain even parity across AD0-31 and C/BE0-3#. PAR is stable and valid one clock after the address phase. For data phases, PAR is stable and valid one clock after either I[...]

  • Page 104

    Major Chips Description 2- 47 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 30 SERR# (MCLKOUT) OD System Error. Used to report system errors where the result will be catastrophic (address parity error, data parity errors for Special Cycle commands, etc.). This output is actively d[...]

  • Page 105

    2- 48 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 51 50 49 48 47 46 45 44 41 40 38 37 36 35 34 33 20 19 18 17 16 15 14 13 8 7 6 5 4 3 2 1 AD00 AD01 AD02 AD03 AD04 AD05 AD06 AD07 AD08 AD09 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD[...]

  • Page 106

    Major Chips Description 2- 49 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 43 32 21 10 C/BE0# C/BE1# C/BE2# C/BE3# In In In In Bus Command / Byte Enables. During the address phase. of a bus transaction, these pins define the bus command see list below: C/BE3-0 Command Type 65550 [...]

  • Page 107

    2- 50 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description PCI Bus Interface (continued) 90 91 92 93 94 95 96 97 98 CA0 (P16) CA1 (P17) CA2 (P18) CA3 (P19) CA4 (P10) CA5 (P21) CA6 (P22) CA7 (P23) CA8 (BLANK) Out Out Out Out Out Out Out Out I/O Address bus for DRAM C. CA0-7 may be configured as flat pane[...]

  • Page 108

    Major Chips Description 2- 51 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Display Memory Interface 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 MAD0 MAD1 MAD2 (CFG10) MAD3 (CFG11) MAD4 (CFG12) MAD5 (CFG13) MAD6 (CFG14) MAD7 (CFG15) MAD8 (PCI ROMD0) MAD9 (PCI ROMD1) MAD10 (PCI ROMD2) MAD11 [...]

  • Page 109

    2- 52 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface 71 72 73 74 75 76 78 79 81 82 83 84 85 86 87 88 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out Out 8, 9, 12, or 16-bit flat panel data output. 18-bit[...]

  • Page 110

    Major Chips Description 2- 53 Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Flat Panel Display Interface (continued) 55 RSET In Set point resistor for the internal color palette DAC. A 560 Ω 1% resistor is required between RSET and AGND. 59 56 AVCC AGND VCC GND Analog power and ground pins for noise isolatio[...]

  • Page 111

    2- 54 Service Guide Table 2-10 C&T 65550 Pin Descriptions (continued) Pin# Pin Name Type Description Power / Ground and Standby Control (continued) 66 63 89 DCC DGND DGND VCC GND GND Power / Ground (Bus Interface) 5V ± 10% or 3.3V ± 0.3V. 158 161 142 139 108 105 MVCCA MGNDA MVCCB MGNDB MVCCC MGNDC Power / Ground (Bus Interface) 5V ± 10% or 3[...]

  • Page 112

    Major Chips Description 2- 55 BUS OUTPUT SIGNAL STATUS DURING STANDBY MODE Table 2-12 Bus Output Signal Status During Standby Mode 65550 Pin# Signal Name Signal Status 53 ACTI / A26 Driven Low 54 EBABKL / A27 Driven Low 24 LRDY# / RDY Tri-Stated 25 LDEV# Tri-Stated 51-44, 41-40, 38-33 D0-15 Tri-Stated 20-13, 8-1 D16-31 Tri-Stated S/TS stands for &q[...]

  • Page 113

    2- 56 Service Guide 2.6 TI PCI1131 CardBus Controller 2.6.1 Overview The PCI1131 is a bridge between the PCI local bus and two PC Card sockets supporting both 16- bit and 32-bit CardBus PC Cards, and is compliant with the PCI Local Bus Specification Revision 2.1 and PCMCIA's 1995 PCI Card Standard. The PCI 1131 PC Card interface recognizes and[...]

  • Page 114

    Major Chips Description 2- 57 2.6.2 Architecture The Texas Instruments PCI1131 is a high-performance PCI-to-PC Card controller that supports two independent PC Card sockets compliant with the1995 PC Card Standard. The PCI1131 provides a rich set of features which make it the best choice for bridging between PCI and PC Cards in both notebook and des[...]

  • Page 115

    2- 58 Service Guide • Packaged in a 208-pin TQFP • Multi-function PCI Device with Separate Configuration Spaces for each Socket • Five PCI Memory Windows and Two l/O Windows Available to each PC Card16 Socket • Two l/O Windows and Two Memory Windows Available to each CardBus socket • CardBus Memory Windows can be Individually selected pre[...]

  • Page 116

    Major Chips Description 2- 59 2.6.4 Block Diagram Figure 2-11 Functional Block Diagram - 16-bit PC Card Interface[...]

  • Page 117

    2- 60 Service Guide Figure 2-12 Functional block diagram - CardBus Card Interface[...]

  • Page 118

    Major Chips Description 2- 61 2.6.5 Pin Diagram Figure 2-13 PCI-to-PC Card (16-bit) terminal assignments[...]

  • Page 119

    2- 62 Service Guide Figure 2-14 PCI-to- CardBus terminal assignments[...]

  • Page 120

    Major Chips Description 2- 63 2.6.6 Terminal Functions Table 2-13 PCI1131 Pin Descriptions TERMINAL NAME NO. I/O TYPE FUNCTION PCI System Terminals PCLK 165 I PCI Bus clock. The PCI bus clock provides timing for all transactions on the PCI bus. All PCI signals are sampled at the rising edge of PCLK. RSTIN 166 I PCI Reset. When the RSTIN signal is a[...]

  • Page 121

    2- 64 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO. I/O TYPE FUNCTION PCI Address and Data Terminals C/BE3 180 C/BE2 192 C/BE1 203 C/BE0 5 I/O 8us commands and byte enables. These are muitiplexed on the same PCI terminals. During the address phase, C/BE-0 define the bus command. During the data phase, C /ENEW-O are[...]

  • Page 122

    Major Chips Description 2- 65 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO. I/O TYPE FUNCTION PCI Interface Control Terminals TRDY 196 I/O Target ready. Indicates the PCI 1131 ability to complete the current data phase of the transaction. TRDY is used in conjunction with IRDY. A data phase is completed on any clock where both TR[...]

  • Page 123

    2- 66 Service Guide Table 2-13 PCI113 1 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Address and Data (Slots A and B) D15 93 27 D14 91 25 D13 89 23 D12 87 20 D11 84 18 D10 147 81 D9 145 79 D8 142 77 D6 90 24 D5 88 21 D4 85 19 D3 83 17 D2 146 80 D1 144 78 D0 141 76 I/O PC Card Data. 16-bit PC Ca[...]

  • Page 124

    Major Chips Description 2- 67 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Interface Control Signals (Slots A and B) BVD2 137 71 (SPKR) I Battery Voltage Detect 2. Generated by 16-bit memory PC Cards that include batteries. BVD2 is used with BVD 1 as an indication of the cond[...]

  • Page 125

    2- 68 Service Guide Table 2-13 PCI11 31 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Address and Data (Slots A and B) IORD 99 33 O I/O Read. LORD is asserted by the PCI1131 to enable 16-bit l/O PC Card data output during host I/O read cycles. (DMA Write) This pin is used as the DMA write strobe[...]

  • Page 126

    Major Chips Description 2- 69 Table 2-13 PCI1131 Pin Descriptions ( Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ 1 6-bit PC Card Interface Control Signals (Slots A and B) WP 139 73 (IOIS16) I Write Protect. This signal applies to 16-bit Memory PC Cards. WP reflects the status of the write-protect switch on 16-bitmemory PC Cards[...]

  • Page 127

    2- 70 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Address and Data Signals (Slots A and B) CC/BE0 94 28 CC/BE1 104 39 CC/BE2 117 52 CC/BE3 130 63 I/O CardBus PC Card Command and Byte Enables. These signals are multiplexed on the same pin. During the address pha[...]

  • Page 128

    Major Chips Description 2- 71 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Interface Control Signals (Slots A and B) CBLOCK 107 42 I/O CardBus Lock. This is an optional signal used to lock a particular address, ensuring a bus initiator exclusive access. NOTE: This signal is n[...]

  • Page 129

    2- 72 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL Name Slot Slot I/O TYPE FUNCTION A+ B ≠ ≠ CardBus PC Card Interface Control Signals (Slots A and B) CREQ 127 61 I CardBus Request. This signal ir1dicates to the arbiter that the CardBus PC Card desires use the CardBus bus. CGNT 110 46 O CardBus Grant. This signal is dr[...]

  • Page 130

    Major Chips Description 2- 73 Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO I /O TYPE FUNCTION Interrupt Terminals IRQ3/INTA 154 IRQ4/INTB 155 O Interrupt Request 3 and Interrupt Request 4. These terminals may be connected to either PCI or ISA interrupts. These terminals are software configurable as IRQ3 or T1VTA, and as IRQ4 or [...]

  • Page 131

    2- 74 Service Guide Table 2-13 PCI1131 Pin Descriptions (Continued) TERMINAL NAME NO I /O TYPE FUNCTION Interrupt Terminals IRQ15/ RI_OUT 163 I/O Interrupt Request 15. This terminal indicates an interrupt request from one of the PC Cards. RI_OUT allows the RI input from the 1 6- bit PC Card, CSTSCHG from CardBus Cards or PC Card removal events to b[...]

  • Page 132

    Major Chips Description 2- 75 2.7 NS87336VJG Super I/O Controller The PC87336VJG is a single chip solution for most commonly used I/O peripherals in ISA, and EISA based computers. It incorporates a Floppy Disk Controller(FDC), two full featured UARTs, and an IEEE 1284 compatible parallel port Standard PC-AT address decoding for all the peripherals [...]

  • Page 133

    2- 76 Service Guide • The Bidirectional Parallel Port: • Enhanced Parallel Port(EPP) compatible • Extended Capabilities Port(ECP) compatible, including level 2 support • Bidirectional under either software or hardware control • Compatible with ISA, and EISA, architectures • Ability to multiplex FDC signals on parallel port pins allows u[...]

  • Page 134

    Major Chips Description 2- 77 • Plug and Play Compatible: • 16 bit addressing(full programmable) • 10 selectable IRQs • 3 selectable DMA Channels • 3 SIRQ Inputs allows external devices to mapping IRQs • 100-Pin TQFP package - PC87336VJG 2.7.2 Block Diagram Configuration Registers UART (16550 or 16450) UART + IrDA/HP & Sharp IR (165[...]

  • Page 135

    2- 78 Service Guide 2.7.3 Pin Diagram Figure 2-16 NS87336VJG Pin Diagram[...]

  • Page 136

    Major Chips Description 2- 79 2.7.4 Pin Description Table 2-14 NS87336VJG Pin Descriptions Pin No. I/O Description A15-A0 67, 64, 62-60, 29, 19- 28 I Address. These address lines from the microprocessor determine which internal register is accessed. A0-A15 are don't cares during DMA transfer. /ACK 83 I Parallel Port Acknowledge. This input is [...]

  • Page 137

    2- 80 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /CS0, /CS1 51, 3 O Programmable Chip Select. /CS0, 1 are programmable chip select and/or latch enable and/or output enable signals that can be used as game port, I/O expand, etc. The decoded address and the assertion conditions are configured via the 8733[...]

  • Page 138

    Major Chips Description 2- 81 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description DENSEL (Normal Mode) 46 O FDC Density Select. DENSEL indicates that a high FDC density data rate (500 Kbs, 1 Mbs or 2 Mbs) or a low density data rate (250 or 300 Kbs) is selected. DENSEL is active high for high density (5.25-inch drives) when ID[...]

  • Page 139

    2- 82 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /DRV2 47 I FDD Drive2. This input indicates whether a second disk drive has been installed. The state of this pin is available from Status Register A in PS/2 mode. (See PNF for further information). /DSKCHG (Normal Mode) 30 I Disk Change. The input indica[...]

  • Page 140

    Major Chips Description 2- 83 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description IORCHDY 51 O I/O Channel Ready. When IORCHDY is driven low, the EPP extends the host cycle. IRQ3, 4 IRQ5-7 IRQ9-11 IRQ12, 15 ( PnP Mode) 99, 98 96-94, 55-57, 66, 58 I/O Interrupt 3, 4, 5, 6, 7, 9, 10, 11, 12, and 15. This pin can be a totem- pol[...]

  • Page 141

    2- 84 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /MSEN0 /MSEN1 (Normal Mode) 50, 49 I Media Sense. These pins are Media Sense input pins when bit 0 of FCR is 0. Each pin has a 10 K Ω internal pull-up resistor. When bit 0 of FCR is 1, these pins are Data Rate output pins and the pull-up resistors are d[...]

  • Page 142

    Major Chips Description 2- 85 Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description /RI1 /RI2 68, 60 I UARTs Ring Indicator. When low, this indicates that a telephone ring signal has been received by the modem. The /RI signal is a modem status input whose condition is tested by the CPU by reading bit 6 (RI) of the Modem Status [...]

  • Page 143

    2- 86 Service Guide Table 2-14 NS87336VJG Pin Descriptions (continued) Pin No. I/O Description TC 4 I Terminal Count. Control signal from the DMA controller to indicate the termination of a DMA transfer. TC is accepted only when FDACK is active. TC is active high in PC-AT and Model 30 modes, and active low in PS/2 mode. /TRK0 (Normal Mode) 35 I FDC[...]

  • Page 144

    Major Chips Description 2- 87 2.8 Yamaha YMF715 Audio Chip YMF715-S (OPL3-SA3) is a single audio chip that integrates OPL3 and its DAC, 16 bit Sigma- delta CODEC, MPU401 MIDI interface, joystick with timer, and a 3D enhanced controller including all the analog components which is suitable for multi-media application. This LSI is fully compliant wit[...]

  • Page 145

    2- 88 Service Guide 2.8.2 Pin Diagram Figure 2-17 YMF715 Block Diagram[...]

  • Page 146

    Major Chips Description 2- 89 2.8.3 Pin Descriptions Table 2-15 YMF715 Descriptions Pin name Pins I/O Type Size Function ISA bus interface: 36 pins D7-0 8 I/O TTL 24mA Data Bus Al 1-0 12 I TTL 2mA Address Bus AEN 1 I TTL 2mA Address Bus Enable /IOW 1 I Schmitt 4mA Write Enable /IOR 1 I Schmitt 4mA Read Enable RESET 1 I Schmitt 4mA Reset IRQ3,5,7,9,[...]

  • Page 147

    2- 90 Service Guide Table 2-15 YMF715 Descriptions (Continued) Pin name Pins I/O Type Size Function Multi-purpose Dins: 13 pins SEL2-0 3 I+ CMOS 2mA Refer to “ Multi-purpose pins” section MP9-0 l0 I+/O TTL 4mA Refer to “ multi-purpose pins” section Others: 27 pins GPO - GP3 4 IA - - Game Port GP4- GP7 4 I+ Schmitt 2mA Game Port RXD 1 I+ Sch[...]

  • Page 148

    Major Chips Description 2- 91 2.9 T62.062.C Battery Charger 2.9.1 Overview Ambit T62.062.C.00 charger is designed exclusively for TI Extensa 610 notebook computer as a power management and battery charger module which can charge a 9 cells Nickel-Metal Hydride ( NiMH) or 9 cells with 3’s parallel and 3’s serial Lithium Ion(LIB) Battery pack. Whe[...]

  • Page 149

    2- 92 Service Guide • Max. T • Safety charging timer • Battery temperature constantly monitoring • Over voltage protect 13V • Providing low battery warning signals when the system using battery as the main power source 2.9.3 Absolute Maximum Ratings Table 2-16 T62.062.C Absolute Maximum Ratings Table Parameter Maximum Ratings Supply volta[...]

  • Page 150

    Major Chips Description 2- 93 Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition MIN TYP MAX UNITS OUTPUT AC Source input Signal (Voltage) (Supply current) AD5V AC source voltage > 8V 4.5 5 5.25 10 V mA Battery in use (High) (Low) (Supply current) BAT-IN-USE# @I load=100uA 2.7 5 5.25 0.7 100 V V uA Power[...]

  • Page 151

    2- 94 Service Guide Table 2-17 T62.062.C Electrical Characteristics Table (Continued) Parameter Symbol Condition MIN TYP MAX UNITS SAFETY OPERATION Over voltage protect by Software NiMH LiB_lon 16.2 13 V V Note 1: External Adapter: Voltage limit 20V1V with maximum 24V over voltage as well as over current protection. 2.9.5 Pin Diagram DC_BAT_OUT 1 o[...]

  • Page 152

    Major Chips Description 2- 95 2.9.6 Pin Description Table 2-18 T62.062.C Pin Description table Item Pin Name I/O Description SAFETY OPERATION 1 DC_BAT_OUT O/P .adapter power input and battery power output terminal( with 5 A short circuit protection) 2 DC_BAT_OUT O/P same as pin 1 3 DC_BAT_OUT O/P same as pin 1 4 DC_BAT_OUT O/P same as pin 1 5 GND g[...]

  • Page 153

    2- 96 Service Guide 2.9.7 Functions Description 2.9.7.1 Charge Function A. FOR NIMH BATTERY When the charger module charges a 9 cells NiMH battery, 0V and T/ t, max T and - v detentions will be used as the main methods to determine the full charged battery. To ensure safety for the battery and system, fast charging NiMH battery after long period of[...]

  • Page 154

    Major Chips Description 2- 97 When system on if Adapter not inserted and battery voltage lower than BL3 voltage , then system will be turned off by the charger module. In addition, when system sends a ‘disable’ signal to charger module, system will be turned off by the charger module immedietly. 2.9.7.3 Safety Concerns For safety, the charger m[...]

  • Page 155

    2- 98 Service Guide 2.10 T62.061.C DC-DC Converter This compact, high efficiency DC/DC Converter features +5V, +3.3V, 2.35V/2.45V/2.9V/3.1V, +12V and +6V five outputs up to 22 watts. And it accepts input from 7V to 21V, suitable for 3 cells Lithium Ion or 10 cells NiMH battery input Pentium based Notebook PC. The converter also supplies P.G. signal[...]

  • Page 156

    Major Chips Description 2- 99 2.10.3 Specifications Input: • DC BATT_IN:7V-8V DC Output: • + 5V :Load :0~2A • +12V :Load :0~0.12A • The other conditions same as 2.2.1 Input: • DCBATT_IN :8V-21V DC Output: • +5V: Load : 0A-3.2A Regulation: +5%, -5% • Ripple : 50mV ( max) • Noise: 100mV ( max) • OVP: 6.5-8.2V • Short-circuit prote[...]

  • Page 157

    2- 100 Service Guide • +2.35V:(2.45V) Load : 0A-4.2A Regulation: +5%, -4% • Ripple : 50mA ( max) • Noise: 100mV ( max) • OVP: 3.3-5.0V • Short-circuit protection • Fuse protection • *Ripple( max)=75mV when regulate in IDLE mode • +12V : Load : 0A-0.15A Regulation: +/-5% • Ripple : 100mV ( max) • Noise: 200mV ( max) • OVP: 14-2[...]

  • Page 158

    Major Chips Description 2- 101 Output filter capacitor The recommended value is 30uF/Amps TAN or OS-CON CAP. Efficiency: 90%(MIN) at 12V input and 5V/1.5A , 3.3V/0.8A , 2.9V/0.6A load. Environment: • Operating • Temperature: 0 to 65 • Relative Humidity: 10% to 95% • Shipping/Storage • Temperature: 25 to 85 • Relative Humidity: 10% to 95[...]

  • Page 159

    2- 102 Service Guide 2.11 T62.064.C DC-AC Inverter (11.3") THIS IS A DC-AC INVERTER UNIT TO DRIVE BACKLIGHT CCFT FOR NOTEBOOK COMPUTERS Table 2-20 MAXIMUM RATINGS ITEM SYMBOL MIN MAX UNIT REMARK INPUT VOLTAGE Vin 7 22 V INPUT CURRENT Iin -- 0.6 A 2.11.1 Electrical Specifications Electrical Characteristics Table 2-21 Electrical Characteristics [...]

  • Page 160

    Major Chips Description 2- 103 Operation Conditions • OPERATING TEMPERATURE 0 TO +50 • OPERATING HUMIDITY 90% MAX. R.H • STORAGE TEMPERATURE 10 TO +85 • STORAGE HUMIDITY 90% MAX. R.H • MTBF 50000 HRS 2.11.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-22 Pin Description PIN NO. SYMBOL DESCRIPRION 1 DCBATTIN DC (7.0V ~ 21.[...]

  • Page 161

    2- 104 Service Guide 2.11.3 Top Overlay Figure 2-20 T62.064.C DC-AC Inverter Top Overlay diagram 2.11.4 Bottom Overlay Figure 2-21 T62.064.C DC-AC Inverter Bottom Overlay diagram[...]

  • Page 162

    Major Chips Description 2- 105 2.12 T62.066.C DC-AC Inverter (12.1") This is a DC-AC inverter unit to drive Backlight CCFT for notebook computers Table 2-23 MAXIMUM RATINGS ITEM SYMBOL MIN MAX UNIT REMARK INPUT VOLTAGE Vin 7 21 V INPUT CURRENT Iin -- 0.65 A 2.12.1 Electrical Specifications Electrical Characteristics Table 2-24 Electrical Chara[...]

  • Page 163

    2- 106 Service Guide 2.12.2 Pin & Connector Assignment J1: 52103-1217 (MOLEX) Table 2-25 J1: 52103-1217 (MOLEX) Pin Description PIN NO. SYMBOL DESCRIPRION 1 DCBATTIN DC (7.0V ~ 21.0V) 2 GND POWER GND 3 CCFTON PWM SIGNAL FOR ON/OFF AND BRIGHTNESS CONTROL 4 DATA ID X24C02 DATA 5 +5.0V +5.0V ± 10% 6 SGND LOGIC GND FOR X24C02 7 N.C. 8 CK CLOCK FOR[...]

  • Page 164

    Major Chips Description 2- 107 2.12.3 Top Overlay Figure 2-22 T62.066.C DC-AC Inverter Top Overlay diagram 2.12.4 Bottom Overlay Figure 2-23 T62.066.C DC-AC Inverter Bottom Overlay diagram[...]

  • Page 165

    C h a p t e r 3 C h a p t e r 3 BIOS Setup Information BIOS Setup Information 3- 1 The notebook has a BIOS setup utility that allows you to configure the notebook and its hardware settings. This chapter tells how to use the Setup utility and describes each parameter item in the setup screens. The notebook is also bundled with Windows 95-based noteb[...]

  • Page 166

    3- 2 Service Guide 3.2 Entering Setup Press F2 during POST to enter Setup. The BIOS Utility main screen displays. Setup Utility Basic System Settings System Security Power Management Settings Load Setup Default Settings ↑↓ =Move Highlight Bar, ↵ =Select, Esc=Exit There are four main menu items: • Basic System Settings • System Security ?[...]

  • Page 167

    BIOS Setup Information 3- 3 • When you press Esc to exit the Setup utility, the following prompt appears: Do you want to save CMOS data? [Yes] [No] • Select [Yes] to save the changes you made to the configuration values or [No] to abandon the changes and retain the current values.[...]

  • Page 168

    3- 4 Service Guide 3.3 Basic System Configuration Basic System Configuration has a one-page screen display illustrated below. Basic System Settings Date ----------------------- [Dec 06,1996] Time ----------------------- [10:00:00] Floppy Disk A -------------- [1.44 MB 3.5-inch] Floppy Disk B -------------- [ None ] Cylinder Head Sector Hard Disk (1[...]

  • Page 169

    BIOS Setup Information 3- 5 3.3.5 Memory Test The notebook can test main memory for errors when you turn it on. The default setting, [Disabled] , allows the notebook to bypass the memory test and speed up the self-test procedure. 3.3.6 Boot Display If you connect an external monitor, you can switch display between the LCD and the external display. [...]

  • Page 170

    3- 6 Service Guide 3.4 System Security System Security Disk Drive Control Floppy Disk Drive ------------- [Normal] Hard Disk Drive --------------- [Normal] System Boot Drive ------------- [Drive A Then C] CD-ROM Bootable --------------- [Disabled] On Board Communication Ports Serial Port 1 Base Address ---- [3F8h(IRQ 4)] Parallel Port Base Address [...]

  • Page 171

    BIOS Setup Information 3- 7 3.4.3 System Boot Drive Control This parameter determines which drive the notebook boots from when you turn it on. The following table lists the three possible settings. Table 3-4 System Boot Drive Control Settings Setting Description Drive A Then C (default) Notebook boots from floppy drive A. If there is no system disk[...]

  • Page 172

    3- 8 Service Guide 3.4.5 Serial Port 1 Base Address The serial port can accommodate a modem, serial mouse, serial printer, or other serial devices. The default setting for the serial port base address is 3F8h(IRQ 4) 1 . Other options include: • 2F8h(IRQ 3) • 3E8h(IRQ 4) • 2E8h(IRQ 3) • Disabled Make sure the serial port base address does no[...]

  • Page 173

    BIOS Setup Information 3- 9 The default setting is [Standard and Bidirectional] . If you set EPP as the parallel port operation mode, do not use 3BCh as the parallel port base address; otherwise, I/O conflicts may occur. ECP DMA Channel Set the ECP DMA Channel parameter if you set the Parallel Port Operation Mode to [Enhanced Capabilities Port(ECP)[...]

  • Page 174

    3- 10 Service Guide 3.4.9 CardBus Support The notebook comes pre-installed with a Windows 95 version which has built-in support for CardBus. In this case, CardBus Support is not needed and set to [Disabled] . If in case you install an older version of Windows 95 which does not have built-in Cardbus driver support, you need to enable this parameter.[...]

  • Page 175

    BIOS Setup Information 3- 11 3.5 Power Management Settings Besides accessing this screen from POST ( F2 ), you can also press Fn-F6 during runtime to access this section of Setup. Power Management Settings Power Management Mode ------------- [Enabled] Display Standby Timer ------------- [ 1] Minute(s) Hard Disk Standby Timer ----------- [ 1] Minute[...]

  • Page 176

    3- 12 Service Guide The valid values for this timer range from 1 to 15 minutes with default set at [1] . Select [Off] to disable the timer. 3.5.4 System Sleep Timer This parameter enables you to set a timeout period for the notebook to enter either standby or hibernation mode. The System Sleep Mode parameter determines which sleep mode the notebook[...]

  • Page 177

    BIOS Setup Information 3- 13 3.5.9 Battery-low Warning Beep This parameter allows you to enable or disable the warning beep generated by the notebook when a battery-low condition occurs. The default setting is [Enabled] . 3.5.10 Sleep Upon Battery-low This parameter enables the notebook to enter standby or hibernation mode when a battery-low condit[...]

  • Page 178

    3- 14 Service Guide 3.6 System Information Reference If you access Setup during runtime ( Fn-F6 ), pressing PgDn after the Power Management Settings screen displays a summary of your notebook’s components and settings. System Information Reference CPU ID : Pentium Internal Cache : 16KB, Enabled CPU Clock : 133 MHz External Cache : 256KB, Enabled [...]

  • Page 179

    BIOS Setup Information 3- 15 Table 3-6 System Status Descriptions Item Description CPU ID Shows the processor type CPU Clock Shows the processor speed System memory Shows the total system memory Video memory Shows the total video memory Floppy Disk A Shows the floppy drive A type Security Shows floppy drive A security setting Floppy Disk B Shows th[...]

  • Page 180

    3- 16 Service Guide 3.7 Load Setup Default Settings Selecting this option allows you to load all the default settings. The default settings are the values initially stored in CMOS RAM intended to provide high performance. If in the future, you change these settings, you can load the default settings again by selecting this option. When you select t[...]

  • Page 181

    C h C h a p t a p t e r 4 e r 4 Disassembly and Unit Replacement Disassembly and Unit Replacement 4- 1 This chapter contains step-by-step procedures on how to disassemble the notebook computer for maintenance and troubleshooting. To disassemble the computer, you need the following tools: • Wrist grounding strap and conductive mat for preventing e[...]

  • Page 182

    4- 2 Service Guide 4.1 General Information 4.1.1 Before You Begin Before proceeding with the disassembly procedure, make sure that you do the following: 1. Turn off the power to the system and all peripherals. 2. Unplug the AC adapter a nd all power and signal cables from the system. 3. Remove the battery pack from the notebook by (1) pressing the [...]

  • Page 183

    D isassembly and Unit Rep lacement 4- 3 4.1.2 Connector Types There are two kinds of connectors on the main board: • Connectors with no locks Unplug the cable by simply pulling out the cable from the connector. • Connectors with locks You can use a plastic stick to lock and unlock connectors with locks. The cables used here are special FPC (fle[...]

  • Page 184

    4- 4 Service Guide 4.1.3 Disassembly Sequence The disassembly procedure described in this manual is divided into four major sections: • Section 4.2: Replacing Memory • Section 4.3: Removing the hard disk drive • Section 4.4: Removing the keyboard • Section 4.5: Disassembling the inside frame assembly • Section 4.6: Disassembling the displ[...]

  • Page 185

    D isassembly and Unit Rep lacement 4- 5 Figure 4-3 Disassembly Sequence Flowchart[...]

  • Page 186

    4- 6 Service Guide 4.2 Replacing Memory Follow these steps to insert memory modules: 1. Turn the computer over to access the base. 2. Remove the screw from the memory expansion door and remove the door. The memory door screw is part of the memory door and does not separate from the memory door. Figure 4-4 Removing the Memory Door 3. Remove the memo[...]

  • Page 187

    D isassembly and Unit Rep lacement 4- 7 5. Replace the memory expansion door and screw in place. Sleep Manager must be run after installing additional memory for the computer to hibernate properly. If Sleep Manager is active, it will automatically adjust the hibernation file on your notebook. If you are using an operating system other than Windows [...]

  • Page 188

    4- 8 Service Guide 3. You will see a tape handle attached to the hard disk drive. Pull out the hard disk drive using the tape handle. Be careful pulling the hard disk drive out. Make sure the connector of the hard disk drive transfer board doesn’t loosen while removing the hard disk drive. Figure 4-7 Removing the Hard Disk Drive 4. Store the hard[...]

  • Page 189

    D isassembly and Unit Rep lacement 4- 9 4.4 Removing the Keyboard Follow these steps to remove the keyboard: 1. Slide out (1) and pull up (2) the two display hinge covers on both sides of the notebook. Figure 4-8 Removing the Display Hinge Covers 2. Unplug the keyboard connectors (CN1 and CN2) from the keyboard connection board. Set aside the keybo[...]

  • Page 190

    4- 10 Service Guide 4.5 Disassembling the Inside Frame Assembly This section discusses how to disassemble the housing, and during its course, includes removing and replacing of certain major components like the internal drive (CD-ROM or floppy), CPU and the main board. Follow these steps: 4.5.1 Removing the Heat Sink Assembly Remove the four screws[...]

  • Page 191

    D isassembly and Unit Rep lacement 4- 11 4.5.2 Removing the Internal Drive 1. Pull up and remove the FDD/CD module latches. 2. Unplug the internal drive cable (CN14/CN17 for CD-ROM or CN14 for FDD). 3. Pull out the internal drive and set it aside. Ensure the drive cables do not become hooked on the inside frame assembly when removing and reinstalli[...]

  • Page 192

    4- 12 Service Guide 4.5.3 Replacing the CPU The unique ZIF (zero insertion force) socket allows you to easily remove the CPU. Follow these steps to remove the CPU and install a replacement CPU. See figure below. 1. Insert a flat-blade screwdriver into the opening at the left end of the socket (labeled OPEN) and push towards the other end of the soc[...]

  • Page 193

    D isassembly and Unit Rep lacement 4- 13 4.5.4 Removing the Display 1. Remove the two screws that secure the display cable to the motherboard. Then unplug the display cable. Figure 4-13 Unplugging the Display Cable 2. Remove the four display hinge screws. Then detach the display from the main unit and set aside. Figure 4-14 Removing the Display Hin[...]

  • Page 194

    4- 14 Service Guide 4.5.5 Detaching the Top Cover 1. Screws found on the lower case secure the top cover with the lower. However, you may not need to remove all six screws. Follow the discussion below for details. • If you only want to remove the top cover from the lower case, remove all screws except for the encircled ones in this figure below. [...]

  • Page 195

    D isassembly and Unit Rep lacement 4- 15 2. Remove three screws near the display hinge screw holes and one screw near the PC card slots. Before you detached the top cover make sure that you unplug the cable for the CN19 (touch pad). Unsnap the top cover from the base assembly and set aside. Figure 4-16 Detaching the Top Cover from the Base Assembly[...]

  • Page 196

    4- 16 Service Guide 4.5.6 Removing the Base Assembly Remove four screws that secure the inside frame assembly to the base assembly. Then detach the inside frame assembly from the base assembly. Figure 4-17 Detaching the Base Assembly[...]

  • Page 197

    D isassembly and Unit Rep lacement 4- 17 4.5.7 Removing the Motherboard 1. Remove the fan by (3) removing the sticker and (4) unplugging the fan cable (CN9). Figure 4-18 Removing the Fan When installing the fan, the fan hole should face the rear of the unit to draw thermal air out of the system. 2. Remove the audio board by (1) unplugging the audio[...]

  • Page 198

    4- 18 Service Guide 3. Unplug the battery connector board cable (CN18). Figure 4-20 Removing the Battery Connector Board 4. Unplug the (a) LCD cover switch cable (CN8) and (b) speaker cables (CN7 and CN10). Figure 4-21 Unplugging the LCD Cover Switch and Speaker C ables CN7 CN8 CN10[...]

  • Page 199

    D isassembly and Unit Rep lacement 4- 19 5. Turn the unit over and remove the two screws that secure the Charger Board to the inside of the assembly frame. Then remove the board. Figure 4-22 Removing the Charger Board 6. Remove seven screws that secure the motherboard to the inside assembly frame. Then release the latch and pull up the motherboard [...]

  • Page 200

    4- 20 Service Guide 4.5.8 Disassembling the Motherboard REMOVING THE PC CARD SLOT UNIT The PC Card Connector Module is normally part of the motherboard spare part. The following removal procedure is for reference only. Figure 4-24 Removing the PC Card Slot Unit REMOVING THE KEYBOARD CONNECTION BOARD Pull up the keyboard connection board to remove i[...]

  • Page 201

    D isassembly and Unit Rep lacement 4- 21 4.5.9 Removing the Touchpad The touchpad is connected to the top cover. Follow these steps to remove the touchpad assembly: 1. Peel off the mylar. 2. Remove the three screws and disconnect the touchpad cable (J2), then remove the touchpad main sensor and connector unit. 3. Lift up and remove the touchpad. 4.[...]

  • Page 202

    4- 22 Service Guide 4.6 Disassembling the Display Follow these steps to disassemble the display: 1. Remove the oval LCD bumpers at the top of the display and the long bumper on the LCD hinge. Figure 4-27 Removing the LCD Bumpers 2. Remove five screws on the display bezel. or Screw List: x4, M2.5L6 x1, M2.5L6(for TFT LCD) x1, M2.5x8(for STN LCD) Fig[...]

  • Page 203

    D isassembly and Unit Rep lacement 4- 23 3. Pull out and remove the display bezel by first pulling on the inside of the bezel sides and lower bezel area. Then pull up the top bezel area. 3 1 1 1 2 2 Figure 4-29 Removing the Display Bezel 4. Twist (1), then slide out (2) and remove the Hinge Cable Cover. Figure 4-30 Removing the Hinge Cable Cover Th[...]

  • Page 204

    4- 24 Service Guide 5. Remove screws on the four sides of the display panel. Then gently fold b ack the foil around the display panel and unplug the inverter cable (J2). The encircled screw doesn’t exist in STN LCD model . Figure 4-31 Removing the LCD Panel 6. Tilt the LCD Panel away for the display cover. Then unplug the LCD Panel from the Displ[...]

  • Page 205

    D isassembly and Unit Rep lacement 4- 25 5. Remove the screws that secure the DC-AC Inverter Board to the display back cover and remove the inverter boards. Then unplug the display cable. Figure 4-33 Removing the DC-AC Inverter and LCD ID Inverter Boards 5. Remove five screws that secure the LCD cable to the display back over, then remove the LCD c[...]

  • Page 206

    A p A p p e n d p e n d i x A i x A Model Number Definition Model Number Definition A- 1 This appendix shows the model number definition of the notebook. 610 XX - X X X Keyboard Language Version 0: Swiss/US G: German 1: US(110V) I: Italian 2: US(220V) J: Japanese 3: US w/o power cord N: Norwegian 4: US K/B w/o power cord(ACLA) R: Russian 5: US(110V[...]

  • Page 207

    A- 2 Service Guide 370P XX - X X X Hard Disk 0: No Hard Disk 3:340MB A: 1GB 1: 120MB 5:520MB C:1.35GB 2: 200MB 8:810MB D:1.4GB B: 250MB 9:1.3GB E: 2.1GB LCD C :11.3" DSTN CX:11.3" TFT DX:12.1" TFT[...]

  • Page 208

    A p p e n d i x B A p p e n d i x B Exploded View Diagram Exploded View Diagram B- 1 This appendix shows an exploded view diagram of the notebook.[...]

  • Page 209

    B- 2 Service Guide[...]

  • Page 210

    Exploded View Diagram B- 3[...]

  • Page 211

    A p A p p e n d p e n d i x C i x C Spare Parts Spare Parts C- 1 This appendix lists the spare parts of the notebook TI EXTENSA 610. Table C-1 Spare Parts List PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << MECHANICAL & MODULES >> 1 IC CHARGE (power supply charger bd) 05.62062.020 9811768-0001 56 2 FAN 5V UDQFC3E09 105MM 2[...]

  • Page 212

    C- 2 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << DISPLAY COMMON PARTS >> 1 HINGE (L), SAE AN370, EXT 61X 34.46909.001 9813520-0001 2 HINGE ( R), EXT. 61X 34.46905.001 9811814-0001 3 MYLAR, LCD, 100MM, EXT 61X 40.46928.001 9811817-0001 4 LCD LATCH, EXT 61X 6M.48410.001 9815[...]

  • Page 213

    Spare Parts C- 3 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS << MAIN BD >> 1 IC CPU INTEL P54CSLM 120M 3.1V 01.IP54S.C0M 9811798-0001 2 IC CPU INTEL P54CSLM 150M 2.9V SPGA 01.IP54S.F0B 9815594-0001 3 IC CPU INTEL P55C (MMX) 150M 2.45V SPGA 01.ip55c.f00 9815595-0001 4 MAIN BOARD 0MB W/O CPU[...]

  • Page 214

    C- 4 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS KEYBOARDS KB-84 KEY KAS1901-0161R US 370 (US) 90.46907.001 9805728-0001 27 w/cable Keyboard(UK) 90.46907.00U 9805758-0002 27 w/cable Keyboard(Germany) 90.46907.00G 9805758-0003 27 w/cable Keyboard(French) 90.46907.00F 9805758-0004 27 w/cab[...]

  • Page 215

    Spare Parts C- 5 Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N Ref. Exploded View COMMENTS SERVICE KITS MISC. PARTS PACK 6M.48409.001 9815599-0001 1 SCREW LCD CAP(47.46901.001) * 10 PCS see above kit 2 CAP RUBBER(47.46917.001) * 10 PCS see above kit 3 CLIPPER CABLE(42.46921.001) * 10 PCS see above kit 4 RUBBER FOOT (47.46902.001) [...]

  • Page 216

    C- 6 Service Guide Table C1 Spare parts list (continued) PART NAME ACER P/N TI P/N options Misc. EXT BTY CHARGER 91.48428.001 370P ONLY 91.48428.001 9811764-0001 EXT FLOPPY DRIVE 91.46905.002 370/370P 91.46905.002 9811765-0001 PS/2 CABLE 50.46812.001 50.46812.001 9811766-0001 FILE TRANSFER CABLE 50.30014.001 50.30014.001 9811767-0001 Power AC ADAPT[...]

  • Page 217

    A p p e n d i x D A p p e n d i x D Schematics This appendix shows the schematic diagrams of the notebook.[...]

  • Page 218

    Date: February 12, 1997 Sheet 1 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CPU) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 RP19 SRP10K $CACHE# $HLOCK# $AP $BUSCHK# $FRCMC# $FLUSH# $WBWT# $PEN# 3.3V 3.3V 1 2 R214 10KR3 $DC# $MIO# $WR# $CPURST $SMIACT# $CPUADS# $CPUSMI# $TCK $WBWT# $TRST# 2.9V 3.3V ## 2 2 2 4 2 2,5 8 R214 NOT INSTALL[...]

  • Page 219

    Date: February 12, 1997 Sheet 2 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1521 CPU TO PCI BRIDGE) TAIPEI TAIWAN R.O.C ACER 1 2 R103 33R3 DQ 1 CLK/CONV# 2 RST# 3 GND 4 VDD 8 THIGH 7 TLOW 6 TCOM 5 U18 DS1620 TH_COM CPU_TH CPU_TL +5V +5V 8,13 20 DQ 1 CLK/CONV# 2 RST# 3 GND 4 VDD 8 THIGH 7 TLOW 6 TCOM 5 U22 DS1620 TH_CLK TH_RST# TH_DQ T[...]

  • Page 220

    Date: February 12, 1997 Sheet 3 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1521 PART2) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 RP42 SRN10 RAS#1 RAS#2 RAS#2 RAS#1 4,8,17,20,21,24 6 AD[0..31] AD0 AD1 AD2 AD[0..31] RASJ2 RASJ1 +5V M D 3 5 M D 3 4 M D 3 3 M D 3 2 M D 3 1 M D 3 0 M D 2 9 M D 2 8 M D 2 7 M D 2 6 M D 2 5 M D 2 4 M D 2 3 M [...]

  • Page 221

    Date: February 12, 1997 Sheet 4 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M1523 PCI TO ISA & IDE CONTROLLER) TAIPEI TAIWAN R.O.C ACER 1 2 R88 10KR3 PULLL2 +5V TC SYSCLK BALE SBHE# SIRQI RTCROMCS# KBCS# IRQ1 IRQ8# REFRESH# MEMCS16# IOCS16# $1523SMI# $1523INIT TC SYSCLK BALE SBHE# SIRQI RTCROMCS# KBCS# IRQ8# IRQ1 REFRESH# 11,24 13 [...]

  • Page 222

    Date: February 12, 1997 Sheet 5 of 25 Size Document Number REV A3 96149 SC Title 370P/J (256KB CACHE) TAIPEI TAIWAN R.O.C ACER ADV# 83 ADSP# 84 ADSC# 85 CLK 89 CS1# 98 CS2 97 CS2# 92 WEA 93 WEB 94 WEC 95 WED 96 OE# 86 A0 37 A1 36 A2 35 A3 34 A4 33 A5 32 A6 100 A7 99 A8 82 A9 81 A10 44 A11 45 A12 46 A13 47 A14 48 FT/NC 14 NC 1 NC 16 NC 42 NC 38 MODE[...]

  • Page 223

    Date: February 12, 1997 Sheet 6 of 25 Size Document Number REV A3 96149 SC Title 370P/J (DIMM SOCKET) TAIPEI TAIWAN R.O.C ACER 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 13[...]

  • Page 224

    Date: February 12, 1997 Sheet 7 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CY2263 CLOCK GENERATOR) TAIPEI TAIWAN R.O.C ACER 1 2 R201 33R3 CLK4M 8 ## D 2 CLK 3 Q 5 Q 6 VCC 14 P R 4 GND 7 C L 1 U47A SSHCT74 1 2 R192 33R3 D 12 CLK 11 Q 9 Q 8 VCC 14 P R 1 0 GND 7 C L 1 3 U47B SSHCT74 CLK7M +5V +5V +5V +5V +5V +5V 10 S0 S1 CLOCK 0 0 50MHZ [...]

  • Page 225

    Date: February 12, 1997 Sheet 8 of 25 Size Document Number REV A3 96149 SC Title 370P/J (M7101 PMU) TAIPEI TAIWAN R.O.C ACER CLOSE TO U34 1 2 R107 47R3 9 8 1 4 1 0 7 U26C SSHC125 1 2 R122 470R3 $STPCLK# PLED# DISPLED# +5V 3.3V +5V 9 8 1 4 1 0 7 U13C SOLCX125M 1 19 16 9 10 8 1 4 7 U43C SSHCT08 SA16 XSA16 XSA17 TH_COM $23STP# EXCACD# TH_DQ_VGA PWR_SW[...]

  • Page 226

    Date: February 12, 1997 Sheet 9 of 25 Size Document Number REV A3 96149 SC Title 370P/J (RTC AND BIOS) TAIPEI TAIWAN R.O.C ACER 1 2 R9 10KR3 SD[0..7] IRQ8# IRQ8# SD[0..7] +5V 4,8 4,10,11,13,15 1 2 DX2 S1N4148 RTCIRQ8# VCC 24 CS$ 13 AS 14 R/W$ 15 DS 17 RST$ 18 RCL$ 21 EXTRAM 22 BC 20 X1 2 X2 3 AD7 11 AD6 10 AD5 9 AD4 8 AD3 7 AD2 6 AD1 5 AD0 4 INT$ 1[...]

  • Page 227

    Date: February 12, 1997 Sheet 10 of 25 Size Document Number REV A3 96149 SC Title 370P/J (KB CONTROLLER) TAIPEI TAIWAN R.O.C ACER +5V 8 1 2 3 4 8 7 6 5 SW2 KHS04 D Q 2 1 D Q 1 2 D Q 0 3 W R # 4 R D # 5 C S # 6 A 0 7 P 5 3 / S R D Y # 8 P 5 2 / S C L K 9 P 5 1 / T X D 1 0 P 5 0 / R X D 1 1 P 4 7 / I N T 4 1 2 P 4 6 / I N T 3 1 3 P 4 5 / I B F 0 # / [...]

  • Page 228

    Date: February 12, 1997 Sheet 11 of 25 Size Document Number REV A3 96149 SC Title 370P/J (NS87336 SUPER I/O) TAIPEI TAIWAN R.O.C ACER C161 SCD1U C162 SCD1U PSOUT1 PRTS1# PDTR1# PSIN1 PDSR1# PCTS1# PRI1# PDCD1# +5V 12 12 12 12 12 12 12 12 SB: CHANGE MAX213 TO MAX3243 C163 SCD1U C164 SCD1U C1+ 28 C1- 24 C2+ 1 C2- 2 T1IN 14 T2IN 13 T3IN 12 R2OUTB 20 R[...]

  • Page 229

    Date: February 12, 1997 Sheet 12 of 25 Size Document Number REV A3 96149 SC Title 370P/J (||PORT,SERIAL PORT,EXT. FDD) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 26 CN3 PRNT25-4-D C142 SC150P C134 SC150P C135 SC150P C136 SC150P C137 SC150P C138 SC150P C139 SC150P C140 SC150P C141 SC150P PD[0..7] PA[...]

  • Page 230

    Date: February 12, 1997 Sheet 13 of 25 Size Document Number REV A3 96149 SC Title 370P/J (GOLDEN FINGER I/F) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 9 10 RP49 SRP10K 1 2 3 4 5 6 7 8 9 10 RP2 SRP4K7 DRQ0 IOCHK# EXTSW# DRQ0 RSTDRV 4 4 HDD+5V 1 2 3 4 5 6 7 8 9 10 RP47 SRP10K 1 2 3 4 5 6 7 8 9 10 RP50 SRP10K DRQ1 SD4 SD5 SD6 SD7 MEMR# MEMW# DRQ1 SD13 [...]

  • Page 231

    Date: February 12, 1997 Sheet 14 of 25 Size Document Number REV A3 96149 SC Title 370P/J (IDE & CD-ROM & FDD CONN) TAIPEI TAIWAN R.O.C ACER PCIRST# IDE_D4 IDE_D5 IDE_D6 IDE_D7 24 CDROM+5V 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 31 33 34 CN17 MOLEX-CONN30A IDE_D8 IDE_D9 IDE_D10 IDE_D11 CX3 SC4D7U16[...]

  • Page 232

    Date: January 27, 1997 Sheet 15 of 25 Size Document Number REV A3 96149 SC Title 370P/J (AUDIO YMF-715) TAIPEI TAIWAN R.O.C ACER 1 2 R72 220KR3 C216 SC1U16V5JX C75 SC1U16V5JX CD_R CD_L +7V AUD_GND 1 2 R71 10KR3 1 2 R70 10KR3 1 2 R73 220KR3 1 2 G3 GAP-CLOSE CD_AUDR CD_AUDL AVDD5 AUD_GND 14 14 C67 SCD1U C201 SC1U16V5JX C39 SC1U16V5JX C62 SC1U16V5JX C[...]

  • Page 233

    Date: February 12, 1997 Sheet 16 of 25 Size Document Number REV A3 96149 SC Title 370P/J (AUDIO AMP & CONN) TAIPEI TAIWAN R.O.C ACER 12 13 11 1 4 7 U25D SSHC00 BBT_QCHG CHARGELED BBT_QCHG 5VSB_DC 19 5VSB_DC 1 2 3 1 4 7 U25A SSHC00 9 10 8 1 4 7 U25C SSHC00 4 5 6 1 4 7 U25B SSHC00 1 2 R7 47KR3 BT_QCHG LED# LED# 5VSB_DC 5VSB_DC 5VSB_DC 5VSB_DC 8 2[...]

  • Page 234

    Date: February 12, 1997 Sheet 17 of 25 Size Document Number REV A3 96149 SC Title 370P/J (VGA CT65550) TAIPEI TAIWAN R.O.C ACER 1 2 3 4 5 6 7 8 RP11 SRN33 1 2 3 4 5 6 7 8 RP10 SRN33 VRAMOE# VCASAL# VCASAH# VWEA# VRASA# 18 18 18 18 C228 SCD1U PRASA# PCASAH# PCASAL# PWEA# VGAPWR VRAMVCC CVCC0 CVCC1 +5V 3.3V VAA[0..8] V M A D 3 V M A D 4 V M A D 5 V M[...]

  • Page 235

    Date: January 27, 1997 Sheet 18 of 25 Size Document Number REV A3 96149 SC Title 370P/J (VRAM & VGA BYPASS CAPACITOR) TAIPEI TAIWAN R.O.C ACER VMAD10 VMAD11 VMAD12 VMAD13 VMAD14 VMAD15 VCC 1 DQ0 2 DQ1 3 DQ2 4 DQ3 5 VCC 6 DQ4 7 DQ5 8 DQ6 9 DQ7 10 N.C 11 N.C 12 N.C 13 N.C 14 WE 15 RAS 16 N.C 17 A0 18 A1 19 A2 20 A3 21 VCC 22 VSS 44 DQ15 43 DQ14 4[...]

  • Page 236

    Date: February 12, 1997 Sheet 19 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CRT CONN.& ZV PORT) TAIPEI TAIWAN R.O.C ACER ZV_PCLK ZV_VREF A_WP UV7 A_A25 A_A10 A_A11 21 17 17 VCC 24 B0 2 A0 3 A1 4 B1 5 B2 6 A2 7 A3 8 B3 9 B4 10 A4 11 OEA 1 OEB 13 GND 12 B9 23 A9 22 A8 21 B8 20 B7 19 A7 18 A6 17 B6 16 B5 15 A5 14 U9 QQST3384 VCC 24 B[...]

  • Page 237

    Date: February 12, 1997 Sheet 20 of 25 Size Document Number REV A3 96149 SC Title 370P/J (LCD I/F) TAIPEI TAIWAN R.O.C ACER CRT_R CRT_G CRT_B 19 19 19 1 2 L9 NL322522T-2R2 1 2 L10 NL322522T-2R2 1 2 L11 NL322522T-2R2 C14 SC47P C13 SC47P 1 2 R13 10R3 1 2 R14 10R3 1 2 R16 10R3 1 2 R19 75R3 1 2 R18 75R3 1 2 R17 75R3 C12 SC47P RGBGND 1 2 3 D2 BAV99LT1 1[...]

  • Page 238

    Date: February 12, 1997 Sheet 21 of 25 Size Document Number REV A3 96149 SC Title 370P/J (PCI1131 CARD BUS CONTROLLER) TAIPEI TAIWAN R.O.C ACER C188 SCD1U C202 SCD1U C214 SCD1U C209 SC10U16V C190 SCD1U C34 SCD1U C35 SC10U16V C37 SC1KP C198 SC1KP 1 2 R151 0R3 INTD# 1130_INTB# INTD# 3.3V 3.3V 3,4 C187 SCD1U 1 2 R161 100R3 C73 SCD1U C74 SC1KP IRQ14 IR[...]

  • Page 239

    Date: February 12, 1997 Sheet 22 of 25 Size Document Number REV A3 96149 SC Title 370P/J (PCMCIA SOCKET) TAIPEI TAIWAN R.O.C ACER B_D[0..15] B_A[0..25] B_CD1# B_CD1# B_D[0..15] B_A[0..25] 21,24 21 21 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 1[...]

  • Page 240

    Date: February 12, 1997 Sheet 23 of 25 Size Document Number REV A3 96149 SC Title 370P/J (CHARGER,DC/DC) TAIPEI TAIWAN R.O.C ACER 1 2 R31 1KR3 DCBATOUT +5V BT_QCHG CX19 SCD1U 5VSB_DC 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 22 24 26 21 23 25 CN11 CONN26A 1 2 R188 470R3 BT_QCHG RESERVE ON/OFF# DCBATOUT 24 C53 SC1000P50V3KX GND 1 GND 2 DC-I[...]

  • Page 241

    Date: February 12, 1997 Sheet 24 of 25 Size Document Number REV A3 96149 SC Title 370P/J (H/W JUMPER SETTING) TAIPEI TAIWAN R.O.C ACER ALADDIN III PULL L: 5V suspend mode enable. PULL H: 5V suspend mode disable. L: DMA DACK[7:5,3:0] polling enable. H: DMA DACK[7:5,3:0] polling disable. *** If L, add ALDN3 P.21 MUX! 1 2 R171 10KR3 1 2 R43 10KR3 XDIR[...]

  • Page 242

    Date: January 27, 1997 Sheet 25 of 25 Size Document Number REV A3 96149 SC Title 370P/J (BYPASS CAPACITORS) TAIPEI TAIWAN R.O.C ACER C240 SCD1U C213 SCD1U C232 SCD1U M1521 C108 SCD1U 3.3V 1 2 C122 ST100U10VDK C248 SCD1U C118 SC10U16V 3.3V C110 SC1U16V5ZY CPU CLOSE TO PIN7,9,11,13,15,17 BYPASS CAPACITORS 1 2 C238 ST100U10VDK 1 2 C246 ST100U10VDK C12[...]

  • Page 243

    A p A p p e n d p e n d i x E i x E BIOS POST Checkpoints BIOS POST Checkpoints E- 1 This appendix lists the POST checkpoints of the notebook BIOS. Table E-1 POST Checkpoint List Checkpoint Description 04h • Check CPU ID • Dispatch Shutdown Path Note: At the beginning of POST, port 64 bit 2 (8042 system flag) is read to determine whether this P[...]

  • Page 244

    E- 2 Service Guide Table E-1 POST Checkpoint List (Continued) Checkpoint Description 2Ch • 128K base memory testing • Set default SS:SP= 0:400 Note: The 128K base memory area is tested for POST execution. The remaining memory area is tested later. 20h • KB controller(8041/8042) testing • KB type determination • Write default command byte [...]

  • Page 245

    BIOS POST Checkpoints E- 3 Table E-1 POST Checkpoint List (Continued) Checkpoint Description 7Ch • Reset pointing device • Check pointing device 70h • Parallel port testing 74h • Serial port testing 78h • Math Coprocessor testing 80h • Set security status 84h • KB device initialization • Set KB led upon setup requests Note: If keybo[...]