Intel BX80635E51660V2 manuel d'utilisation

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Table des matières du manuel d’utilisation

  • Page 1

    Reference Number: 329187-001 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet - Volume One of Two September 2013[...]

  • Page 2

    2 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONN ECTION WITH Intel® PRODUCTS. NO LICENSE, Express* OR IMPLIED, BY ESTOPPEL OR OT HERWISE, TO ANY INT ELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDIT[...]

  • Page 3

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 3 Datasheet Volume One of Two Table of Contents 1O v e r v i e w .......... ........... ............ ............. .......... ............. ............. .......... ............. ........ 11 1.1 Introduction ...... ............. ............. ............ ............. ............. ..[...]

  • Page 4

    4 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 3.2.3 AES Instructions ........... ............. ............. ............ ............. ............. ..........80 3.2.4 Execute Disabl e Bit .............. .......... ............. ............. ............ ............. ...... 81 3.3 Intel® Secure Ke[...]

  • Page 5

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 5 Datasheet Volume One of Two 6.9 Processor Asynchronous Sideband and Miscellane ous Signals ........... ............. ........ 122 6.10 Processor Power and Groun d Supplies ... ............... ............ ............. ............... ...... 125 7 Electrical Specifications ..... ....[...]

  • Page 6

    6 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.3 Fan Power Supply [STS 200C] ... ............... ............... .. .. ............... .. ................. ..... 228 10.3.1 Boxed Processor Cooling Requirements ........ ............ ............... ............. .... 229 10.4 Boxed Pr ocessor Content[...]

  • Page 7

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 7 Datasheet Volume One of Two 2-42 Processor ID Construction Example ......... ...... ... .......... ............. ............ ........... ...... 60 2-43 RdIAMSR() ............... ............ ............. ............. ............ ............. ........... ............ .. 61 2-44 P[...]

  • Page 8

    8 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1-3 Refer e nce d Docum ents ....... .. ........... .. .. .. ........... .. .. .. ............. .......... .. .. .. ............. .. 22 2-1 Summary of Processor-specific PECI Commands .................. ............... ............. ...... 30 2-2 Minor Rev[...]

  • Page 9

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 9 Datasheet Volume One of Two 6-11 System Reference Clock (BCLK{0/1}) Signals ..... .......... ........... ............ ........... .... 121 6-12 JTAG and TA P Sig nals .......... .. ... .. .. ............ ........... .. .. .. .. ........... .. .. .. .. ........... .. .. .. 121 6-13 SV[...]

  • Page 10

    10 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Revision History § Revision Number Descript ion Revisi on Dat e 001 • Initial Rel ease September 2013[...]

  • Page 11

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 11 Datasheet Volume One of Two 1 Overview 1.1 Introduction The Intel® X eon® processor E5-1600 v2/E5-2600 v2 product families datasheet- V olume One provides DC electrical specificat ions, signal integrity , differential signaling specifications, land and signal definitions,[...]

  • Page 12

    Overview 12 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Some processor features are not available on all platforms. R efer to the Intel® Xeon® Processor E5 v2 Product Family Specification Update for de t ai l s o f e ac h pr o ce ss or S KU . The Intel® X eon® processor E5-1600 v2/E5-260 0 v2 prod[...]

  • Page 13

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 13 Datasheet Volume One of Two • Configuratio n Process and Regis ters • Processor Integr ated I/O (IIO) Configur ation R egisters • Processor Uncore Co nfiguration R egisters Figure 1-1. Intel® Xeon® Processor E5-1 600 v2 Product Family on the 1 Socket Platform Figure[...]

  • Page 14

    Overview 14 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.1.1 Processor Feature Details • Up to 12 execution cores • Each core supports two threads (Intel® Hyper- Threading T echnology), up to 24 threads per socket • 46-bit physical addressing and 48-bit virtual addressing • 1 GB large page s[...]

  • Page 15

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 15 Datasheet Volume One of Two • Independent channel mode or lockstep mode • Data burst length of eight cycles for all memory organization modes • Memory DDR3 data transfer rates of 800, 1066, 1333, 160 0, and 1866 MT/s • 64-bit wide channels plus 8-bits of ECC support[...]

  • Page 16

    Overview 16 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Memory thermal monitoring support for DIMM temperature via two memory signals, MEM_HOT_C{01/23}_N 1.2.2 PCI Express* • The PCI Express* port(s) are fully-compliant to the PCI Express* Base Specification, Revision 3.0 (PCIe 3.0) • Support [...]

  • Page 17

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 17 Datasheet Volume One of Two • Power Management Event (PME ) functions. • Message Signaled Interrupt (MSI and MS I- X) messages • Degraded Mode support and Lane Reversal support • Static lane numbering reversal and polarity inversion support • Support for PCIe* 3.0[...]

  • Page 18

    Overview 18 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Static lane numbering reversal support • Sup ports DM I2 virtual channels VC0, VC1, VCm, and VC p 1.2.4 Intel® QuickPath Interconnect (Intel® QPI) • Compliant with Intel QuickPath Interconnect v1.1 standard packet formats • Implements[...]

  • Page 19

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 19 Datasheet Volume One of Two 1.3 Power Management Support 1.3.1 Processor Package and Core States • ACPI C-states as implemented by the following processor C -states: — Package: PC0, PC1/PC1e, PC2, PC3, PC6 (Package C7 is not supported) — Core: CC0, CC1, CC1E , CC3, CC[...]

  • Page 20

    Overview 20 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.6 Terminology Term Description ASPM Active State Power Man a gement BMC Baseboard Management Controllers Cb o Ca c h e a n d C o r e B o x . I t i s a t e r m u s e d for internal logic pr ov iding ring interface to LLC and Core. DDR3 Third gen[...]

  • Page 21

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 21 Datasheet Volume One of Two Intel® Xeon® proce ss or E5-1600 v2 product family Intel’s 22-nm processor de sign, is the follow-on to the 3rd Generation Intel® Core™ Processo r F amily design. It is the ne xt generation pro cessor for use in Intel® Xeon® processor E5[...]

  • Page 22

    Overview 22 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 1.7 Related Documents Refer to the following documents for additional information. SKU A processor Stock K eeping Unit (SKU) to be installed in either server or workstation platforms. Elec trical, powe r and thermal specifications for these SKU?[...]

  • Page 23

    Overview Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 23 Datasheet Volume One of Two 1.8 Statement of Volatility (SOV) Intel® Xeon® processor E5-1600 v2/E5-2600 v2 product families do not retain any end-user data when powered down and/or the processor is physically removed from the socket. 1.9 State of Data The data contained w[...]

  • Page 24

    Overview 24 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two[...]

  • Page 25

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 25 Datasheet Volume One of Two Interfaces 2 Interfaces This chapter describes the interfac es supported by the processor . 2.1 System Memory Interface 2.1.1 System Memory Tec hnology Support The Integrated Memory Controller (IMC) supports DDR3 protocols with four independent 64-bit mem[...]

  • Page 26

    Interfaces 26 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.2 PCI Express* Interface This section describes the PCI Express* 3.0 interface capabilities of the processor . See the PCI Express* Base Specific ation for details of PCI Express* 3.0. 2.2.1 PCI Express* Architecture Compatibility with the PC[...]

  • Page 27

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 27 Datasheet Volume One of Two Interfaces 2.2.1.1 Transaction Layer The upper layer of the PCI Express* architecture is the T ransaction Layer . The T ransaction Lay er's primary responsibilit y is the assembly and disassembly of T ransaction Lay er Packets (TLPs). TLPs are used t[...]

  • Page 28

    Interfaces 28 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PCI Express* extends the configuration space to 4096 bytes per-device/function, as compared to 256 bytes allowed by the Conventional PCI Specification . PCI Express* configuration space is divided into a PCI -comp atible region (which consists [...]

  • Page 29

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 29 Datasheet Volume One of Two Interfaces The Intel® QuickP ath Interconnect has an efficient architecture allowing more interconnect performance to be achiev ed in real systems. It has a snoop protocol optimized for low latency and high scalability , as well as packet and lane struct[...]

  • Page 30

    Interfaces 30 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Generic PECI specification details are out of the scope of this document. What follows is a processor-specific PECI client definition , and is largely an addendum to the PECI Network Layer and Design R ecommendations sections for the PECI speci[...]

  • Page 31

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 31 Datasheet Volume One of Two Interfaces PECI permits writes to certain Memory Controller RA S-related registers in the processor PCI configuration space. Details are covered in Section 2.5.2. 10 . 2.5.2 Client Command Suite PECI command requires at least one frame check sequence (FCS[...]

  • Page 32

    Interfaces 32 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Read Length: 0x08 Command: 0xf7 2.5.2.2.2 D evice Info The Device Info byte gives details regarding the PECI client configuration. A t a minimum, all clients supporting GetDIB w ill return the number of domains inside the package via this field[...]

  • Page 33

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 33 Datasheet Volume One of Two Interfaces For the processor PECI client, the R evision Number it returns will be ‘0011 0100b’ . 2.5.2.3 G etTemp() The GetT emp() command is used to retriev e the die temperature from a target PECI address. The temperature is used by the external the[...]

  • Page 34

    Interfaces 34 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Command: 0x01 Description : R eturns the highest die temperature for addressed proces sor PECI client. Example bus transaction for a thermal sensor device located at address 0x30 returning a value of negative 10 counts is show in Figure 2-9 . 2[...]

  • Page 35

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 35 Datasheet Volume One of Two Interfaces 2.5.2.4.1 Command Format The RdPkgConfig() format is as follows : Write Len gth: 0x05 Read Length: 0x05 (dword) Command: 0xa1 Description : Returns th e data maintained in the processor package configur ation space for the PCS entry as specifie[...]

  • Page 36

    Interfaces 36 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.5 WrPkgConfig() The W rPkgConfig() command pr ovides write access to the package con figuration space (PCS) within the processo r , including various power and thermal management functions. T ypical PCS write services supported by the pro[...]

  • Page 37

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 37 Datasheet Volume One of Two Interfaces Note: The 2-byte p arameter field and 4-byte write da ta field defined in Figure 2-11 are sent in standard PECI ordering with LSB first a nd MS B last. 2.5.2.5.2 Supported Responses The typical client response is a passing FCS, a passing Comple[...]

  • Page 38

    Interfaces 38 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.1 DRAM Thermal and Power Optimiz ation Capabilities DRAM thermal and power optimization (also known as RAPL or “Running Av erage Power Limit”) services provide a way for platform thermal management solutions to progr am and access D[...]

  • Page 39

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 39 Datasheet Volume One of Two Interfaces Notes: 1. Time, energy and powe r units should be assumed, where applicable, to be bas ed on values return ed by a read of the PACKAGE_POWER_S KU_UNIT MSR or through the P ackage Powe r SKU Unit PCS read service. DIMM Ambient Te m p e r a t u r[...]

  • Page 40

    Interfaces 40 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.2 DRAM Ther mal Estimation C o nfiguration Data Read/Write This feature is relevant only when acti vity-based DRAM temper ature estimation methods are being utilized and would appl y to all the DIMMs on all the memory channels. The writ[...]

  • Page 41

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 41 Datasheet Volume One of Two Interfaces 2.5.2.6.4 DIMM Temperature Read This feature allows the PECI host to read the temperature of all the DIMMs within a channel up to a maximum of th ree DIMMs. This read is not limited to platforms using a particular memory temperature source or t[...]

  • Page 42

    Interfaces 42 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.6 D RAM Channel Temperat ure Read This feature enables a PECI host read of the maximum temperature of each channel. This would include all the DIMMs within the ch annel and all the ranks within each of the DIMMs. Channels that are not p[...]

  • Page 43

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 43 Datasheet Volume One of Two Interfaces 2.5.2.6.8 DRAM Power Info Read This read returns the minimum, typical and maximum DRAM power settings and the maximum time window over which the power can be sustained for the entire DRAM domain and is inclusive of all the DIMMs within all the [...]

  • Page 44

    Interfaces 44 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.9 DRAM Power Limit Data Write/Read This feature allows the PECI host to progra m the power limit over a specified time or control window for the entire DRAM domain covering all the DIMMs within all the memory channels. Actual v alues ar[...]

  • Page 45

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 45 Datasheet Volume One of Two Interfaces 2.5.2.6.10 DRAM Power Limit Pe rformance Status Read This service allows the PECI host to assess the performance impact of the currently active DRAM power limiting modes. The read return data contains the sum of all the time durations for which[...]

  • Page 46

    Interfaces 46 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Table 2-8. RdPkgConfig() & WrPkgConfig( ) CPU Thermal and Power Opti mization Services Summ ary (Sheet 1 of 3) Service Index Value (decimal) Parameter Value (word) RdPkgConfig () Data (dword) WrPkgConfig () Data (dword) Description Alternat[...]

  • Page 47

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 47 Datasheet Volume One of Two Interfaces Per C or e DTS Te m p e r a t u r e Rea d 09 0x0000- 0x0007 (cores 0-7) 0x00FF - Syst em Agent Per core DTS maximum temperature N/A Read the maximum DTS temperature of a particular core or the System Agent within the processor die in relative P[...]

  • Page 48

    Interfaces 48 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.12 Package Identifier Read This feature enables the PECI ho st to uniquel y identify the PECI client processor . The parameter field encodings shown in T able 2-8 allow the PECI host to access the relevant processor information as descr[...]

  • Page 49

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 49 Datasheet Volume One of Two Interfaces • CPUID data : This is the equivalent of data that can be accessed through the CPUID instruction execution. It contains processor type, stepping, model and family ID information as shown in Figure 2-21 . • Platform ID dat a : The Platform I[...]

  • Page 50

    Interfaces 50 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • CPU Microcode Update Revision : R eflects the revision number for the microcode update and power control unit firmw are updates on the processor sample. The revision data is a unique 32-bit identifier that reflects a combination of specific[...]

  • Page 51

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 51 Datasheet Volume One of Two Interfaces 2.5.2.6.14 Package Power SKU Read This read allows the PECI host to access the minimum, Thermal Design P ower and maximum power settings for the processor package SKU. It also returns the maximum time interval or window o ver which the power ca[...]

  • Page 52

    Interfaces 52 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two negotiated PECI bit rate. A ‘reset’ or ‘clear ’ of this bit or simply not setting the “W ake on PECI” mode bit could result in a “timeout” response (completion code of 0x82) from the processor indicating that the resources requi[...]

  • Page 53

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 53 Datasheet Volume One of Two Interfaces 2.5.2.6.19 Temperature Targe t Read The T emperature T arget Read allows the PECI host to obtain the target D TS temperature (T Prochot ) for PROCHO T_N assertion in degrees Cels ius. This is the minimum temper ature at which the processor ther[...]

  • Page 54

    Interfaces 54 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.21 Thermal Avera ging Constant Write/Re ad This feature allows the PECI host to co ntrol the window over which the estimated processor PECI temperature is filtered. The host may configure this window as a power of two. F or example, pro[...]

  • Page 55

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 55 Datasheet Volume One of Two Interfaces While Intel requires reading the accumulate d energy data at least onc e ev e ry 16 seconds to ensure functional correctness, a more realistic polling rate recommendation is once every 100mS for better accur acy . This feature assumes a 150W pr[...]

  • Page 56

    Interfaces 56 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The same conversion formula used for DRAM P owe r Limiting (see Section 2.5.2.6.9 ) should be applied for encoding or progra mming the ‘Control Time Window’ in bits [23:17]. 2.5.2.6.26 Package Power Limits f or Multiple Turbo Modes This fea[...]

  • Page 57

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 57 Datasheet Volume One of Two Interfaces 2.5.2.6.27 Package Power Limi t Pe rformance Status Read This service allows the PECI host to assess the performance impact of the currently active power limiting modes. The read return data contains the total amount of time for which the entir[...]

  • Page 58

    Interfaces 58 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.6.29 ACPI P-T Notify Wri te & Read This feature enables the processor turbo capa bility when used in conjunction with the PECI package RAPL or power limit. When th e BMC sets the package power limit to a value below TDP , it also dete[...]

  • Page 59

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 59 Datasheet Volume One of Two Interfaces Bit[11] is the Read Mode bit and should be set to ‘0’ for TOR reads. The R ead Mode bit can alternatively be set to ‘1’ to read the ‘C ore ID’ (with associated valid bit as shown in Figure 2-40 ) that points to the first core that a[...]

  • Page 60

    Interfaces 60 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Description : R eturns the data maintained in the processor IA MSR space as specified by the ‘Processor ID’ and ‘MSR Address’ fields. The R ead Length dictates the desired data return size. This command suppor ts only qword responses. A[...]

  • Page 61

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 61 Datasheet Volume One of Two Interfaces Note: The 2-byte MSR Addres s field and read data field de fined in Figure 2-43 are sent in standard PECI ordering with LSB first a nd MS B last. 2.5.2.7.3 Supported Responses The typical client response is a passing FCS, a passing Completion C[...]

  • Page 62

    Interfaces 62 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PECI access to these registers is expected only when in-band access mechanisms are not av ailable. Notes: 1. The MCi_ADDR and MCi_MIS C registers for machine check banks 2 & 4 are no t implemented on the pr ocessors. The MCi_CT L register f[...]

  • Page 63

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 63 Datasheet Volume One of Two Interfaces 2. The PECI host must determine the total number of machine check banks and the v alidity of the MCi_ADDR and MCi_MISC register contents pri or to issuing a read to the machine check bank similar to st andard machine check architec ture enumera[...]

  • Page 64

    Interfaces 64 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Note: The 4-byte P CI c onfiguration address a n d read data field d efined in Figure 2-45 are sent in standard PECI or dering with LSB first and MSB last. 2.5.2.8.2 S upp o rte d Response s The typical client response is a passing FCS, a passi[...]

  • Page 65

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 65 Datasheet Volume One of Two Interfaces completion code. Alternatively , reads to un implemented or hidden registers may return a completion code of 0x90 indicating an inv alid request. It is also possible that reads to function 0 of non-existent IIO devices issued prior to BIOS POST[...]

  • Page 66

    Interfaces 66 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.9.2 S upp o rte d Response s The typical client response is a passing FCS, a passing Completion Code and valid data. Under some conditions, the client’s response will indicate a failure. The PECI client response can also vary depe nding[...]

  • Page 67

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 67 Datasheet Volume One of Two Interfaces AW FCS Support: Ye s Description : W rites the data sent to the reques ted register address. Write Length dictates the desired write granularity . The command always returns a completion code indicating pass/fail status. Re fer to Section 2.5.5[...]

  • Page 68

    Interfaces 68 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.2.10.3 WrPCIConfigLocal () Capabiliti es On the processor PECI clients, the PECI W rPCIConfigLocal() command provides a method for programming certain in tegrated m emory controller and IIO functions as described in T able 2-15 . Refer to t[...]

  • Page 69

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 69 Datasheet Volume One of Two Interfaces In the event that the processor is tri-stated using power -on-configur ation controls, the PECI client will also be tri-stated. Processor tri-state controls are described in Section 7.3, “Power -On Configuration (POC) Options” . 2.5.3.2 Dev[...]

  • Page 70

    Interfaces 70 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two to a different PECI addresses. Strapping the SOCK ET_ID[1:0] pins results in the client addresses shown in T able 2-17 . These package strap(s) are evaluated at the assertion of PWRGOOD (as depicted in Figure 2-49 ). R efer to the appropriate P[...]

  • Page 71

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 71 Datasheet Volume One of Two Interfaces 2.5.3.5 S-st ates The processor PECI client is always guar anteed to b e operational in the S0 sleep state. • The Ping(), GetDIB(), GetT emp(), RdPkgConfig(), W rPkgConfig(), RdPCIConfigLocal() and W rPCIConfigLocal() will be fully operationa[...]

  • Page 72

    Interfaces 72 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.3.7.1 BMC INIT Mode The BMC INIT b oot mode is used to provid e a quick and efficient means to transfer responsibility for uncore configur ation to a service processor like the BMC. In th is mode, the socket performs a minimal amount o f in[...]

  • Page 73

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 73 Datasheet Volume One of Two Interfaces The processor PECI client will not clear the semaphore that was acquired to service the request until the originator sends the ‘retry’ re quest in a timely fashion to successfully retrieve the response data. In the absence of any automatic [...]

  • Page 74

    Interfaces 74 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.5 Client Responses 2.5.5.1 Abort FCS The Client responds with an Abort FCS under the following conditions: • The decoded command is not understood or not supported on this processor (this includes good command codes with bad Read Length o[...]

  • Page 75

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 75 Datasheet Volume One of Two Interfaces Note: The codes explicitly defined in Ta b l e 2-22 may be useful in PECI originator response algorithms. R eserved or undefined codes m a y also be generated by a PE CI client device, and the originating agent must be cap able of toler ating a[...]

  • Page 76

    Interfaces 76 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 2.5.7.2 Interpretation The resolution of the processor’ s Digital Th ermal Sensor (D TS) is approximately 1°C, which can be confirmed by a RDMSR from the IA32_THERM_ST A TUS MSR where it is architecturally defined. The MSR read will return o[...]

  • Page 77

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 77 Datasheet Volume One of Two Technologies 3 Technologies 3.1 Intel® Virtualization Technology (Intel® VT) Intel® Virtualization T echnology (Intel® VT ) makes a single system appear as multiple independent systems to software. This allows multiple, independent oper ating systems [...]

  • Page 78

    Technologies 78 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 3.1.2 Intel® VT-x Features The processor core supports th e following Intel VT -x features: • Extended Page T ables (EPT) — hardware assisted page table virtualization — eliminates VM exits from guest OS to the VMM for sh adow page-tab[...]

  • Page 79

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 79 Datasheet Volume One of Two Technologies partitions in the same operating system , or there can be multiple oper ating system instances running on the same system – offering benefits such as system consolidation, legacy migration, activity partitioning or security . 3.1.3.1 Intel [...]

  • Page 80

    Technologies 80 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The Intel TXT platform helps to provide the authenticit y o f the controlling en v ironment such that those wishing to rely on the platform can make an appropriate tru st decision. The Intel TXT platform determines the identity of th e contro[...]

  • Page 81

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 81 Datasheet Volume One of Two Technologies The architecture consists of six instructions that offer full hardw are support for AES. Fo ur instructions support the AES encryption and decryption, and the other two instructions support the AES key expansion. T ogether , they offer a sign[...]

  • Page 82

    Technologies 82 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two For more information on Intel Hyper- Threading T echnology , see http://www .intel.com/products/ht/hyperthreading_more.htm. 3.6 Intel® Turbo Boost Technology Intel T urbo Boost T echnology is a feature that allows the processor to opportunis[...]

  • Page 83

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 83 Datasheet Volume One of Two Technologies 3.8 Intel® Intelligent Power Technology Intel® Intelligent P ower T echnology conserves power while delivering advanced power- management capabilities at the r ack, group, and data center level. Providing the highest system-level performanc[...]

  • Page 84

    Technologies 84 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two • Extensibility - Intel AVX has built -in extensibility for the future vector extensions: — OS context management for v ector-widths beyond 256 bits is streamlined. — Efficient instruction encoding allows unlimited functional enhancemen[...]

  • Page 85

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 85 Datasheet Volume One of Two Power Management 4 Power Management This chapter provides information on the following power management topics: •A C P I S t a t e s •S y s t e m S t a t e s • Processor Core/Package States • Integrated Memory Controller (IMC ) and System Memory S[...]

  • Page 86

    Power Management 86 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Processor Core and P ackage C7 is not supporte d. 2. All package states are d efined to be “E” states - such th at they always exit back into the LFM point upon executi on resume 3. The mapping of actions for PC3, and PC6 ar[...]

  • Page 87

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 87 Datasheet Volume One of Two Power Management 4.1.4 DMI2/PCI Express* Link States Note: L1 is o n ly supported w hen the DM I2/ PCI Express* po rt is operating a s a P CI Express * po rt. 4.1.5 Intel® Qui ckPath Intercon nect States 4.1.6 G, S, and C State Combinations Self-R e fres[...]

  • Page 88

    Power Management 88 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.2 Processor Core/Package Power Management While executin g co de, Enhan ced Intel SpeedStep® T echnolog y optimizes the processor’s frequency and core voltage base d on workload. Each frequency and voltage operating point is defined [...]

  • Page 89

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 89 Datasheet Volume One of Two Power Management While individual threads can request low power C -states, power saving actions only take place once the core C -state is resolved . Core C -states are automatically resolved by the processor . For thread and core C -states , a transition [...]

  • Page 90

    Power Management 90 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two from the ACPI-defined processor clock con t rol registers, referred to as P_L VLx. This method of requesting C -states provides legacy support for oper ating systems that initiate C-state transitions via I/O reads. For legacy oper ating s[...]

  • Page 91

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 91 Datasheet Volume One of Two Power Management A System Management Interrupt (SMI) handler returns execution to either Norm al state or the C1/C1E state. See the Intel® 64 and IA -32 Architecture Software Developer’s Manual, Volume 3A/3B: System Programmer’s Guide for more inform[...]

  • Page 92

    Power Management 92 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two — The platform may allow additional po wer savings to be realized in the processor . • For package C -states, the processor is not required to enter C0 before entering any other C-state. The processor exits a package C -state when a b[...]

  • Page 93

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 93 Datasheet Volume One of Two Power Management 4.2.5.1 Package C0 The normal operating state for the processor . The processor remains in the normal state when at least one of its cores is in the C0 o r C1 state or when the platform has not granted permission to the processor to go in[...]

  • Page 94

    Power Management 94 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.2.5.3 Packa ge C2 State Package C2 state is an intermediate state which represents the point at which the system level coordination is in progress. The package cannot reach this state unless all cores are in at least C3. The package wil[...]

  • Page 95

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 95 Datasheet Volume One of Two Power Management 4.2.6 Package C-State Power Specifications The table below lists the processor package C -state power specifications for v arious processor SKUs. Fo r details on processor SKU information, see T abl e 1-1, “HCC, MCC, and LCC SKU T able [...]

  • Page 96

    Power Management 96 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 4.3 System Memory Power Management The DDR3 power states can be summarized as the following: • Normal operation (highest power consumption). • CKE Power-Down: Opportunistic, per rank control after idle time. There may be different lev[...]

  • Page 97

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 97 Datasheet Volume One of Two Power Management • Precharge power-down slow exit: In this mode the data-in DLL ’ s on DDR are off . Existing this mode is 3 - 5 DCLK cycles until the first co mmand is allowed, but about 16 cycles until first data is allowed. 4.3.2 Self Refresh The P[...]

  • Page 98

    Power Management 98 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The I/O buffer for an unused signal should be tristated (output driver disabled), the input receiver (differential sense-amp) shou ld be disabled. The input path must be gated to prevent spurious results due to n ois e on the unused signa[...]

  • Page 99

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 99 Datasheet Volume One of Two Thermal Management Specifications 5 Thermal Management Specifications 5.1 Package Thermal Specifications The processor requires a thermal solution to maintain temper atures within operating limits. Any attempt to oper ate the processor outside these limit[...]

  • Page 100

    Thermal Management Specifications 100 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The temperature reported over PECI is alw a ys a negative v alue and represents a delta below the onset of thermal control circuit (T CC) activation, as indicated by PROCHO T_N (see Chapter 7, “Electrical Specification[...]

  • Page 101

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 101 Datasheet Volume One of Two Thermal Management Specifications 5.1.2 T CASE and DTS Based Therma l Specifications T o simplify compliance to thermal specifications at processor run time, the processor has added a Digital Thermal Sensor (DTS) b ased thermal specification. Digital The[...]

  • Page 102

    Thermal Management Specifications 102 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.3 Processor Operation al Thermal Specifications Each SKU has a unique thermal profile that ensures reliable operation for the intended form factor over the processor’ s service lif e. These specifications are based[...]

  • Page 103

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 103 Datasheet Volume One of Two Thermal Management Specifications Table 5-1. T Case Temperature Thermal Specifications TDP (W) Model Number Core Count T LA (°C) PSI CA (°C/W) Minimum T CASE (°C) Maximum T CASE (°C) 150W WS E5-2687W v2 8 39.5 0 .2 17 5.0 72.0 130W 1U E5-2697 v2 12 5[...]

  • Page 104

    Thermal Management Specifications 104 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.3.3 Digital Thermal Sensor (DTS) thermal profiles Each D TS thermal profile is unique to each TDP and core count combination. These T DTS profiles are fully defined by the simple linear equation: T DTS = PSI PA * P +[...]

  • Page 105

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 105 Datasheet Volume One of Two Thermal Management Specifications 130W 2U E5-2687W v2 E5-2667 v2 8 49.8 0.317 91.0 E5-2643 v2 6 49.8 0.359 96.5 E5-2637 v2 4 50.1 0.422 105.0 130W 1S E5-1660 v2 E5-1650 v2 6 42.6 0.400 94.6 E5-1620 v2 4 42.6 0.480 105.0 115W 1U E5-2695 v2 12 55.0 0.317 9[...]

  • Page 106

    Thermal Management Specifications 106 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.4 Embedded Server Thermal Profiles Network Equipment Building System (NEBS) is the most common set of environm ental design guidelines applied to telecommuni cations equipment in the United States. Embedded server SK[...]

  • Page 107

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 107 Datasheet Volume One of Two Thermal Management Specifications P ower specifications are defined at all VID values found in Ta b l e 7 - 3 . The processor may be d elivered under multiple VIDs for each freque ncy . Implementation of a specified thermal profile should result in vi rt[...]

  • Page 108

    Thermal Management Specifications 108 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 5.1.4.2 Embedded Dig ital T hermal Sensor (DTS) thermal profiles The thermal solution is expected to be de veloped in accordance with the T case thermal profile. Operational compliance monitorin g of thermal specificatio[...]

  • Page 109

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 109 Datasheet Volume One of Two Thermal Management Specifications up to T control is permitted at all power levels. Compliance to the D TS profile is required for any temperatu res exceeding T control. 5.1.5 Thermal Metrology The minimum and maximum case temper a tures (T CASE ) are me[...]

  • Page 110

    Thermal Management Specifications 110 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Figure is not to scale and is for reference only . 2. This is an example for package size 52.5 x 45 mm. 3. B1: Max = 52.57 mm, Min = 52.43 mm. 4. B2: Max = 45.07 mm, Min = 44.93 mm. 5. C1: Max = 43.1 mm, Min = [...]

  • Page 111

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 111 Datasheet Volume One of Two Thermal Management Specifications reduced frequency and voltage results in a reduction to the processor power consumption. The second method (clock modulation) reduces power consumption by modulating (starting and stopping) the internal processor core cl[...]

  • Page 112

    Thermal Management Specifications 112 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two SVID/frequency points. T ransition of the SVID code will occur first, to insure proper operation once the processor reaches its normal oper ating frequency . Refer to Figure 5-6 for an illustr ation of this ordering. 5.2[...]

  • Page 113

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 113 Datasheet Volume One of Two Thermal Management Specifications Demand mode, the duty cycle of the clock mo dulation is programmable via bits 3:0 of the same IA32_CLOCK_MODULA TION MSR. In On-Demand mode, the duty cy cle can be programmed from 6.25% on / 93.75% off to 93.75% on / 6.2[...]

  • Page 114

    Thermal Management Specifications 114 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two asserted, all processor supplies (VCC, VTT A , VT TD, VSA, VCCPLL, VCCD) must be removed within the timefr ame provided. The temper ature at which THERMTRIP_N asserts is not user configur able and is not software visible[...]

  • Page 115

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 115 Datasheet Volume One of Two Thermal Management Specifications to zero, then the processor ignores all external assertions of MEM_HO T_{C01/C23}_N signals (in effect they become outputs). • Output Function: The output behavior of the MEM_HO T_{C01/C23}_ N signals supports Leve l m[...]

  • Page 116

    Thermal Management Specifications 116 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two[...]

  • Page 117

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 117 Datasheet Volume One of Two Signal Descriptions 6 Signal Descriptions This chapter describes the processor signals. They are arr anged in functional groups according to their associated interface or category . 6.1 System Memory Interface Signals Table 6-1. Memory Channel DDR0, DDR1[...]

  • Page 118

    Signal Descriptions 118 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.2 PCI Express* Based Interface Signals Note: PCI Express* P orts 1, 2 and 3 Signals are receiv e and transmit differential pairs. Table 6-2. Memory Channel Miscellaneous Signal Name Description DDR_RESET_C01_N DDR_RESET_C23_N System[...]

  • Page 119

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 119 Datasheet Volume One of Two Signal Descriptions PE2D_RX_DN[15:12] PE2D_RX_DP[15:12] PCIe Receiv e Data Input PE2A_TX_DN[3:0] PE2A_TX_DP[3:0] PCIe T ransmit Data Output PE2B_TX_DN[7:4] PE2B_TX_DP[7:4] PCIe T ransmi t Data Output PE2C_TX_DN[11:8] PE2C_TX_DP[11:8] PCIe T ransmi t Data[...]

  • Page 120

    Signal Descriptions 120 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.3 DMI2/PCI Express* Port 0 Signals 6.4 Intel® QuickPath Interconnect Signals PEHPSDA PCI Express* Hot-Plug SMBus Da ta: Provides PCI Express* hot- plug support via a de dicated SMBus inter face. Requires an external general pur pos[...]

  • Page 121

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 121 Datasheet Volume One of Two Signal Descriptions 6.5 PECI Signal 6.6 System Reference Clock Signals 6.7 JTAG and TAP Signals Table 6-10. PECI Signals Signal Name Description PECI PECI (Platform Environment Control Interface) is the serial sideband interfac e to the proces so r and i[...]

  • Page 122

    Signal Descriptions 122 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 6.8 Serial VID Interface (SVID) Signals 6.9 Processor Asynchronous Sideband and Miscellaneous Signals Table 6-13. SVID Signals SVIDALER T_N Serial VID alert. SVIDCLK Serial VID clock. SVIDDA T A Serial VID data out. Table 6-14. Proces[...]

  • Page 123

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 123 Datasheet Volume One of Two Signal Descriptions MEM_HOT_C01_N MEM_HOT_C23_N Memory throttle control. MEM_HO T_C01_N and MEM_HO T_C23_N signals h ave two m odes of operation – input a nd out put mod e. Input mode is externally asserted and is used to detect external events such as[...]

  • Page 124

    Signal Descriptions 124 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two SOCKET_ID[1:0] Socket ID Str ap. Socket id entification configuration straps for establishing the PECI address, Intel® QPI Node ID, and other settings. This signal is used in combin ation with FRMAGENT to determine whethe r the socke[...]

  • Page 125

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 125 Datasheet Volume One of Two Signal Descriptions 6.10 Processor Power and Ground Supplies Table 6-15. Miscellaneous Sign als Signal Name Description IVT_ID_N This output can be used by the platform to determine if the installed processor is an Intel® X eon® processor E5-1600 v2 pr[...]

  • Page 126

    Signal Descriptions 126 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two § VSA V ariable power supply for th e processor s ystem agent uni ts. These include lo gic (non-I/ O) for the integr ated I/O cont roller , the integrated memory controller (iMC), the Intel® QPI agent, and the Power Co ntrol Unit (P[...]

  • Page 127

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 127 Datasheet Volume One of Two Electrical Specifications 7 Electrical Specifications 7.1 Processor Signaling The processor includes 2011 lands, which us e v arious signaling technologies. Signals are grouped by electrical characteristics and buffer t ype into various sign al groups. T[...]

  • Page 128

    Electrical Specifications 128 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.1.5 Platform Environmenta l Control Interface (PECI) PECI is an Intel proprietary interface that provides a comm unication channel between Intel processors and chipset components to external system management logic and thermal[...]

  • Page 129

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 129 Datasheet Volume One of Two Electrical Specifications Clock multiplying within the processor is provided by the internal phase locked loop (PLL), which requires a constant frequenc y BCLK{0/1}_DP , BCLK{0/1}_ DN input, with exceptions for spread spectrum clocking. DC specifications[...]

  • Page 130

    Electrical Specifications 130 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.1.9.2 Decoupling Guidelines Due to its large number of transistors and hi gh internal clock speeds, the processor is capable of generating large current swings between low and full power states. This ma y cause voltages on pow[...]

  • Page 131

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 131 Datasheet Volume One of Two Electrical Specifications • SetVID_fast (10 mV/µs for V SA /V CCD ), •S e t V I D _ s l o w ( 2 . 5 mV/ µs f or V SA /V CCD ), and • Slew Rate Decay (down ward voltage only and it’ s a function of the output capacitance’ s time constant) comm[...]

  • Page 132

    Electrical Specifications 132 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The VR may change its configuration to meet the processor’ s power needs with greater efficiency . For example, it may reduce th e number of active phases, transition from CCM (Continuous Conduction Mode) to DCM (Discontinuous[...]

  • Page 133

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 133 Datasheet Volume One of Two Electrical Specifications Notes: 1. Check with VR vendors for determ ining t he physical addr ess assignment method for their controllers. 2. VR addressing is assign ed on a per voltage r ail basis. 3. Dual VR controllers will have tw o address es with t[...]

  • Page 134

    Electrical Specifications 134 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. 00h = Off State 2. VID Range HEX 01-32 are not used by the processor . 3. For VID Ranges supported s ee Ta b l e 7 - 1 1 . 4. VCCD is a fixed voltage of 1.35V or 1.5V . 7.1.10 Reserved or Unused Signals All Reserved (R[...]

  • Page 135

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 135 Datasheet Volume One of Two Electrical Specifications PCI Express* PC I Express* interfac e s ignals. These sign als are compatible with PCI Express 3.0 Signalling Environment AC Specifications and are AC coupled. The buffers are not 3.3-V tolerant. Refer to the PCIe specification.[...]

  • Page 136

    Electrical Specifications 136 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Differential PCI Express* Output PE1A_TX_D[N/P][3:0] PE1B_TX_D[N/P][7:4] PE2A_TX_D[N/P][3:0] PE2B_TX_D[N/P][7:4] PE2C_TX_D[N/P][11:8] PE2D_TX_D[N/P][15:12] PE3A_TX_D[N/P][3:0] PE3B_TX_D[N/P][7:4] PE3C_TX_D[N/P][11:8] PE3D_TX_D[N[...]

  • Page 137

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 137 Datasheet Volume One of Two Electrical Specifications Notes: 1. Refer to T able 7-19 for details on the R ON (Buffer on R esistance) value for this signal. Processor Asynchronous Sideband Signals Single ended CMOS1.0v Input BIST_ENABLE BMCINIT FRMAGENT PWRGOOD PMSYNC RESET_N SAFE _[...]

  • Page 138

    Electrical Specifications 138 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.3 Power-On Configuration (POC) Options Several con figuration options can be config ured by hardw are. The processor samples its hardware configur ation at reset, on the active-to-inactive tr ansition of RESET_N, or upon asser[...]

  • Page 139

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 139 Datasheet Volume One of Two Electrical Specifications 7.5 Mixing Processors Intel supports and v alidates two and four processor configurations only in which all processors operate with the same Intel® QuickP ath Interconnect frequency , core frequency , power segment, and have th[...]

  • Page 140

    Electrical Specifications 140 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.6 Flexible Motherboard Guidelines (FMB) The Flexible Motherboard (FMB) guidelines are estimates of the maximum values the processor will hav e over certain time periods. The v alues are only estimates and actual specifications[...]

  • Page 141

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 141 Datasheet Volume One of Two Electrical Specifications device storage conditions for a sustained period of tim e. At conditions outside sustained limits, but within absolute maximum and minimum r atings, quality & reliability ma y be affected. Notes: 1. Storage cond itions are a[...]

  • Page 142

    Electrical Specifications 142 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Unless otherwise noted, all specifications in this table apply to all processors. Th es e specificatio ns are based on final si l icon characterizati on. 2. Individual processo r VID values may be calib rated during ma[...]

  • Page 143

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 143 Datasheet Volume One of Two Electrical Specifications Notes: 1. Unless otherwise noted, all specifications in this table apply to a ll processors. These specificat io ns are base d on final si l icon characterization. 2. Launch to FMB, this is the fl exible motherboar d guidelines.[...]

  • Page 144

    Electrical Specifications 144 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. The loadline specificat ion includes both stat ic and transient limits. 2. This table is intended to aid in reading discrete points on graph in Figu re 7-3 . 3. The loadlines specify voltage limits at the die me asured[...]

  • Page 145

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 145 Datasheet Volume One of Two Electrical Specifications and VSS_VC C_SENSE lands. R efer to the co mpatibl e VR12.0 PWM controller for lo adline guidelin es and VR implementation details. 4. The Vcc_min and Vcc_max loadlines repr es ent static and transient limits. Please se e Chapte[...]

  • Page 146

    Electrical Specifications 146 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.8.2 Die Voltage Validation Core voltage (V CC ) ov ershoot events at the processor must meet the specifications in Ta b l e 7 - 1 4 when measured across the VCC_SE NSE and VS S_VCC_SENSE land s. Overshoot ev ents that are <[...]

  • Page 147

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 147 Datasheet Volume One of Two Electrical Specifications Notes: 1. V OS_MAX is the measured overshoot voltage. 2. T OS_MAX is the measured time dur ation above VccMAX(I1). 3. Istep: Load Release Current Step, for example, I2 to I1, where I2 > I1. 4. VccMAX(I1) = VID - I1*RLL + 15mV[...]

  • Page 148

    Electrical Specifications 148 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. Unless otherwise noted, all spec ifications in this table appl y to all processor frequencies. 2. The voltage rail V CCD which will be set to 1.50 V or 1.35 V nominal depe nding on the voltage of all DIMMs connected to[...]

  • Page 149

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 149 Datasheet Volume One of Two Electrical Specifications 11. DRAM_PWR_OK_C{01/23} must have a maximum of 30 ns rise or fall time over VCCD * 0.55 +300 mV and -200 mV and the edge must be monotonic. 12. The DDR01/23_RCOMP error tolerance is ±15% from the compensated value. 13. DRAM_PW[...]

  • Page 150

    Electrical Specifications 150 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 8. For Vin between 0 and Vih. Note: 1. These signals are measur ed between VIL and VIH. 2. The signal edge rate must be met or the signal must tr ansition monotonically to the asserted state. Table 7-18. SMBus DC Specifications [...]

  • Page 151

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 151 Datasheet Volume One of Two Electrical Specifications Notes: 1. V TT refers to instantaneous V TT . 2. Measured at 0.31*V TT 3. Vin between 0V and V TT 4. These are measured b etwe en VIL and VIH. 5. The signal edge rate must be met or the signal must tr ansition monotonically to t[...]

  • Page 152

    Electrical Specifications 152 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Notes: 1. IVT_ID_N land is pulled to ground on the package. 7.8.3.1 PCI Express* DC Specifications The processor DC specifications for the PCI Express* are available in the PCI Express Base Specification - Revision 3.0 . This do[...]

  • Page 153

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 153 Datasheet Volume One of Two Electrical Specifications Figure 7-6. BCLK{0/1} Differential Clock Crosspoint Specification Figure 7-7. BCLK{0/1} Differential Cl ock Measurement Point for Ringback Figure 7-8. BCLK{0/1} Sing le Ended Clock Me asurem en t Points for Absolute Cross Point [...]

  • Page 154

    Electrical Specifications 154 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 7.9 Signal Quality Data transfer requires the clean reception of data signals and clock signals. Ringing below receiver thresholds, non-mono tonic si gnal edges, and ex cessive v oltage swings will adversely affect system timing[...]

  • Page 155

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 155 Datasheet Volume One of Two Electrical Specifications 7.9.5 Overshoot/Undershoot Tolerance Overshoot (or undershoot) is the absolute value of th e maximum voltage abov e or below V SS, s ee Figure 7-9 . The overshoot/undershoot specifications limit tr ansitions beyond V CCD or V SS[...]

  • Page 156

    Electrical Specifications 156 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The specification provided in the table show s the maxi mum pulse duration allowed for a given ov ershoot/undershoot magnitude at a spec ific activity factor . Each table entry is independent of all others, meaning that the puls[...]

  • Page 157

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 157 Datasheet Volume One of Two Electrical Specifications § Table 7-24. Processor Sideband Signal Group Overshoot/Un dershoot Tolerance Absolute Maximum Overshoot (V) Absolute Maximum Undershoot (V) Pulse Duration (ns) AF=0.1 Pulse Duration (ns) AF=0.01 1.3335 V 0.2835 V 3 ns 5 ns 1.2[...]

  • Page 158

    Electrical Specifications 158 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two[...]

  • Page 159

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 159 Datasheet Volume One of Two Processor Land Listing 8 Processor Land Listing This chapter provides sorted land list in Section 8.1 and Section 8.2 . Ta b l e 8 - 1 is a listing of all processor lands orde red alphabetically by land name. Ta b l e 8 - 2 is a listing of all processor [...]

  • Page 160

    Processor Land Listing 160 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR0_DQ[10] CH4 SSTL I/O DDR0_DQ[11] CJ5 SSTL I/O DDR0_DQ[12] CA1 SSTL I/O DDR0_DQ[13] CA3 SSTL I/O DDR0_DQ[14] CG3 SSTL I/O DDR0_DQ[15] CG5 SSTL I/O DDR0_DQ[16] CK12 SSTL I/O DDR0_DQ[17] CM12 SSTL I/O DDR0_DQ[18] CK16 SSTL I/O DDR[...]

  • Page 161

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 161 Datasheet Volume One of Two Processor Land Listing DDR0_DQS_DP[12] CB10 SSTL I/O DDR0_DQS_DP[13] CD32 SSTL I/O DDR0_DQS_DP[14] CK32 SSTL I/O DDR0_DQS_DP[15] CC39 SSTL I/O DDR0_DQS_DP[16] CJ39 SSTL I/O DDR0_DQS_DP[17] CD16 SSTL I/O DDR0_ECC[0] CE15 SSTL I/O DDR0_ECC[1] CC15 SSTL I/O[...]

  • Page 162

    Processor Land Listing 162 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR1_DQ[13] DB6 SSTL I/O DDR1_DQ[14] DB10 SSTL I/O DDR1_DQ[15] D F10 SSTL I/O DDR1_DQ[16] CR7 SSTL I/O DDR1_DQ[17] CU7 SSTL I/O DDR1_DQ[18] CT10 SSTL I/O DDR1_DQ[19] CP10 SSTL I/O DDR1_DQ[20] CP6 S STL I/O DDR1_DQ[21] CT6 S STL I/O[...]

  • Page 163

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 163 Datasheet Volume One of Two Processor Land Listing DDR1_DQS_DP[15] CP38 SSTL I/O DDR1_DQS_DP[16] DB38 SSTL I/O DDR1_DQS_DP[17] CY14 SSTL I/O DDR1_ECC[0] DE13 SSTL I/O DDR1_ECC[1] DF14 SSTL I/O DDR1_ECC[2] DD16 SSTL I/O DDR1_ECC[3] D B16 SSTL I/O DDR1_ECC[4] DA13 SS TL I/O DDR1_ECC[[...]

  • Page 164

    Processor Land Listing 164 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR2_DQ[19] U29 SSTL I/O DDR2_DQ[20] T34 SSTL I/O DDR2_DQ[21] P34 SSTL I/O DDR2_DQ[22] V30 S STL I/O DDR2_DQ[23] T30 SSTL I/O DDR2_DQ[24] AC35 SSTL I/O DDR2_DQ[25] AE35 SSTL I/O DDR2_DQ[26] AE33 SSTL I/O DDR2_DQ[27] AF32 SSTL I/O D[...]

  • Page 165

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 165 Datasheet Volume One of Two Processor Land Listing DDR2_ECC[3] AB26 SSTL I/O DDR2_ECC[4] AB30 SSTL I/O DDR2_ECC[5] AD30 S STL I/O DDR2_ECC[6] W27 SSTL I/O DDR2_ECC[7] AA27 SSTL I/O DDR2_MA_PAR M18 SSTL O DDR2_MA[00] AB18 SSTL O DDR2_MA[01] R19 SSTL O DDR2_MA[02] U19 SSTL O DDR2_MA[[...]

  • Page 166

    Processor Land Listing 166 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two DDR3_DQ[22] A33 S STL I/O DDR3_DQ[23] B32 S STL I/O DDR3_DQ[24] M32 SSTL I/O DDR3_DQ[25] L31 SSTL I/O DDR3_DQ[26] M28 SSTL I/O DDR3_DQ[27] L27 SSTL I/O DDR3_DQ[28] L33 SSTL I/O DDR3_DQ[29] K 32 SSTL I/O DDR3_DQ[30] N27 SSTL I/O DDR[...]

  • Page 167

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 167 Datasheet Volume One of Two Processor Land Listing DDR3_ECC[6] F26 SSTL I/O DDR3_ECC[7] H26 SSTL I/O DDR3_MA_PAR B18 SSTL O DDR3_MA[00] A19 SSTL O DDR3_MA[01] E21 SSTL O DDR3_MA[02] F20 SSTL O DDR3_MA[03] B20 SSTL O DDR3_MA[04] D20 SSTL O DDR3_MA[05] A21 SSTL O DDR3_MA[06] F22 SSTL[...]

  • Page 168

    Processor Land Listing 168 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two PE1B_TX_DN[5] L47 PCIEX3 O PE1B_TX_DN[6] K48 PCIEX3 O PE1B_TX_DN[7] L49 PCIEX3 O PE1B_TX_DP[4] H46 PCIEX3 O PE1B_TX_DP[5] J47 PCIEX3 O PE1B_TX_DP[6] H48 PCIEX3 O PE1B_TX_DP[7] J49 PCIEX3 O PE2A_RX_DN[0] N55 PCIEX3 I PE2A_RX_DN[1] V[...]

  • Page 169

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 169 Datasheet Volume One of Two Processor Land Listing PE3A_TX_DP[1] J51 PCIEX3 O PE3A_TX_DP[2] R47 PCIEX3 O PE3A_TX_DP[3] P48 PCIEX3 O PE3B_RX_DN[4] AB50 PCIEX3 I PE3B_RX_DN[5] AB52 PCIEX3 I PE3B_RX_DN[6] AC53 PCIEX3 I PE3B_RX_DN[7] AC51 PCIEX3 I PE3B_RX_DP[4] Y50 PCIEX3 I PE3B_RX_DP[[...]

  • Page 170

    Processor Land Listing 170 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two QPI0_DRX_DN[18] BN49 QPI I QPI0_DRX_DN[19] BM48 QPI I QPI0_DRX_DP[00] BG51 QPI I QPI0_DRX_DP[01] BF52 QP I I QPI0_DRX_DP[02] BE53 QPI I QPI0_DRX_DP[03] BE55 QPI I QPI0_DRX_DP[04] BF56 QP I I QPI0_DRX_DP[05] BF54 QP I I QPI0_DRX_DP[[...]

  • Page 171

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 171 Datasheet Volume One of Two Processor Land Listing QPI1_DRX_DN[18] CM46 QPI I QPI1_DRX_DN[19] CN45 QPI I QPI1_ DRX_DP[ 00] CC55 QPI I QPI1_ DRX_DP[ 01] CD56 QPI I QPI1_ DRX_DP[ 02] CD54 QPI I QPI1_ DRX_DP[ 03] CJ55 QPI I QPI1_ DRX_DP[ 04] CK56 QPI I QPI1_ DRX_DP[ 05] CK54 QPI I QPI[...]

  • Page 172

    Processor Land Listing 172 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two RSVD BH44 RSVD BH46 RSVD BJ43 RSVD BJ45 RSVD BK44 RSVD BL43 RSVD BL45 RSVD BM44 RSVD BM46 RSVD BN47 RSVD BP44 RSVD BP46 RSVD BR43 RSVD BR47 RSVD BT44 RSVD BU43 RSVD BY46 RSVD C53 RSVD CA45 RSVD CD44 RSVD CE43 RSVD CF44 RSVD CG11 RS[...]

  • Page 173

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 173 Datasheet Volume One of Two Processor Land Listing VCC AM10 PWR VCC AM12 PWR VCC AM14 PWR VCC AM16 PWR VCC AM2 P WR VCC AM4 P WR VCC AM6 P WR VCC AM8 P WR VCC AN1 P WR VCC AN11 PWR VCC AN13 PWR VCC AN15 PWR VCC AN17 PWR VCC AN3 P WR VCC AN5 P WR VCC AN7 P WR VCC AN9 P WR VCC AP10 P[...]

  • Page 174

    Processor Land Listing 174 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VCC BE9 PWR VCC BF10 PWR VCC BF12 PWR VCC BF14 PWR VCC BF16 PWR VCC BF2 PWR VCC BF4 PWR VCC BF6 PWR VCC BF8 PWR VCC BG1 PWR VCC BG11 PWR VCC BG13 PWR VCC BG15 PWR VCC BG17 PWR VCC BG3 PWR VCC BG5 PWR VCC BG7 PWR VCC BG9 PWR VCC BH1[...]

  • Page 175

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 175 Datasheet Volume One of Two Processor Land Listing VCC B U7 PWR VCC B U9 PWR VCC BV 10 PWR VCC BV 12 PWR VCC BV 14 PWR VCC BV 16 PWR VCC BV2 P WR VCC BV4 P WR VCC BV6 P WR VCC BV8 P WR VCC BY18 PWR VCC BY26 PWR VCC BY28 PWR VCC BY30 PWR VCC BY32 PWR VCC BY34 PWR VCC BY36 PWR VCC BY[...]

  • Page 176

    Processor Land Listing 176 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSA AH16 PWR VSA AH2 PWR VSA AH4 PWR VSA AH6 PWR VSA AH8 PWR VSA AJ1 PWR VSA AJ11 PWR VSA AJ13 PWR VSA AJ3 PWR VSA AJ5 PWR VSA AJ7 PWR VSA AJ9 PWR VSA B54 PWR VSA G43 PWR VSA G49 PWR VSA N45 PWR VSA N51 PWR VSA_SENSE AG13 O VSS A41[...]

  • Page 177

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 177 Datasheet Volume One of Two Processor Land Listing VSS AK4 GND VSS AK42 GND VSS AK44 GND VSS AK46 GND VSS AK48 GND VSS AK50 GND VSS AK6 GND VSS AK8 GND VSS AL43 GND VSS AL45 GND VSS AL49 GND VSS AL51 GND VSS AL53 GND VSS AM56 GND VSS AN55 GND VSS AN57 GND VSS AP42 GND VSS AP44 GND [...]

  • Page 178

    Processor Land Listing 178 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS BF44 GND VSS BG47 GND VSS BH58 GND VSS BJ55 GND VSS BJ57 GND VSS BK42 GND VSS BK46 GND VSS BK48 GND VSS BK50 GND VSS BK52 GND VSS BK54 GND VSS B L1 GND VSS BL11 GND VSS BL13 GND VSS BL15 GND VSS BL17 GND VSS B L3 GND VSS BL49 G[...]

  • Page 179

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 179 Datasheet Volume One of Two Processor Land Listing VSS CC 29 GND VSS CC3 GND VSS CC 43 GND VSS CC 47 GND VSS CC 49 GND VSS CC9 GND VSS CD18 GND VSS CD36 GND VSS CD6 GND VSS CE13 GND VSS CE5 GND VSS CE9 GND VSS CF12 GND VSS CF14 GND VSS CF30 GND VSS CF32 GND VSS CF34 GND VSS CF36 GN[...]

  • Page 180

    Processor Land Listing 180 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS CN9 GND VSS CP12 GND VSS CP16 GND VSS CP36 GND VSS CP40 GND VSS CP42 GND VSS CP44 GND VSS CP46 GND VSS CP48 GND VSS CP50 GND VSS CP52 GND VSS CP56 GND VSS CR11 GND VSS CR35 GND VSS CR47 GND VSS CR49 GND VSS CR5 GND VSS CR9 GND [...]

  • Page 181

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 181 Datasheet Volume One of Two Processor Land Listing VSS DD36 GND VSS DD38 GND VSS DD6 GND VSS DE 17 GND VSS DE 41 GND VSS DE 53 GND VSS DE7 GND VSS DF12 GND VSS DF36 GND VSS DF42 GND VSS DF44 GND VSS DF46 GND VSS DF48 GND VSS DF50 GND VSS DF52 GND VSS DF8 GND VSS E1 GND VSS E29 GND [...]

  • Page 182

    Processor Land Listing 182 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two VSS N49 GND VSS N5 GND VSS N53 GND VSS N9 GND VSS P10 G ND VSS P12 G ND VSS P14 G ND VSS P26 G ND VSS P30 G ND VSS P32 G ND VSS P38 G ND VSS P40 G ND VSS P54 G ND VSS P56 G ND VSS P8 GND VSS R11 GND VSS R29 GND VSS R3 GND VSS R31 G[...]

  • Page 183

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 183 Datasheet Volume One of Two Processor Land Listing 8.2 Listing by Land Number VTTD A T42 PWR VTTD A Y42 PWR VTTD BD42 P WR VTTD BH42 PWR VTTD BK56 P WR VTTD BL51 PWR VTTD BM42 PWR VTTD BR55 PW R Table 8-1. Land Name (Sheet 49 of 50) Land Name Land No. Buffer Type Direction VTTD BU4[...]

  • Page 184

    Processor Land Listing 184 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AB26 DDR2_ECC[3] SSTL I/O AB28 DDR2_DQS_DN[08] SSTL I/O AB30 DDR2_ECC[4] SSTL I/O AB32 DDR2_DQ[30] SSTL I/O AB34 DDR2_DQS_DN[12] SSTL I/O AB36 VSS GND AB38 DDR2_DQS_DP[01] SSTL I/O AB4 DDR2_DQS_DP[07] SSTL I/O AB40 DDR2_DQS_DP[10] [...]

  • Page 185

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 185 Datasheet Volume One of Two Processor Land Listing AE31 VSS GND AE33 DDR2_DQ[26] SSTL I/O AE35 DDR2_DQ[25] SSTL I/O AE37 DDR2_DQ[15] SSTL I/O AE39 VSS GND AE41 DDR2_DQ[08] SSTL I/O AE43 VSS GND AE45 VTT A PW R AE47 VSS GND AE49 VSS GND AE5 DDR2_DQ[59] SSTL I/O AE51 VSS GND AE53 VTT[...]

  • Page 186

    Processor Land Listing 186 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AH48 PE3C_RX_DN[8] PCIEX3 I AH50 PE3C_RX_DN[10] PCIEX3 I AH52 PE_RBIAS P CIEX3 I/O AH54 PE2B_TX_DP[5] P CIEX3 O AH56 PE2C_RX_DP[8] PCIEX3 I AH58 VSS GND AH6 VSA PWR AH8 VSA PWR AJ1 VSA PWR AJ11 VSA PWR AJ13 VSA PWR AJ15 VSS GND AJ1[...]

  • Page 187

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 187 Datasheet Volume One of Two Processor Land Listing AN47 PE3D_RX_DP[13] PCIEX3 I AN49 PE2A_TX_DP[0] PCIEX3 O AN5 VCC PWR AN51 PE2A_TX_DP[2] PCIEX3 O AN53 PE2B_TX_DP[6] PCIEX3 O AN55 VSS GND AN57 VSS GND AN7 VCC PWR AN9 VCC PWR AP10 VCC PWR AP12 VCC PWR AP14 VCC PWR AP16 VCC PWR AP2 [...]

  • Page 188

    Processor Land Listing 188 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two AV44 BPM_N[3] ODCMOS I/O AV4 6 R S V D AV48 PE2D_TX_DP[ 14] PCIEX3 O AV50 PE2D_TX_DP[ 12] PCIEX3 O AV52 PE2C_TX_DP[8] PCIEX3 O AV5 4 V S S GND AV5 6 V S S GND AV58 PE2D_RX_DN[12] P CIEX3 I AV6 V C C PWR AV8 V C C PWR AW1 V CC PWR A[...]

  • Page 189

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 189 Datasheet Volume One of Two Processor Land Listing BB12 VCC PWR BB14 VCC PWR BB16 VCC PWR BB2 VCC PWR BB4 VCC PWR BB42 VSS GND BB44 BPM_N[4] ODCMOS I/O BB46 VSS GND BB48 VSS GND BB50 VSS GND BB52 VSS GND BB54 PE2C_TX_DN[10] PCIEX3 O BB56 PE2D_RX_DN[15] PCIEX3 I BB58 VSS GND BB6 VCC[...]

  • Page 190

    Processor Land Listing 190 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two BG1 VCC PWR BG11 VCC PWR BG13 VCC PWR BG15 VCC PWR BG17 VCC PWR BG3 VCC PWR BG43 RSVD BG45 RSVD BG47 VSS GND BG49 QPI0_DRX_DP[17] QPI I BG5 VCC PWR BG51 QPI0_DRX_DP[00] QPI I BG53 QPI0_DRX_DN[02] QPI I BG55 QPI0_DRX_DN[03] QPI I BG[...]

  • Page 191

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 191 Datasheet Volume One of Two Processor Land Listing BL9 VSS GND BM10 VSS GND BM12 VSS GND BM14 VSS GND BM16 VSS GND BM2 VSS GND BM4 VSS GND BM42 VT TD PWR BM44 RSVD BM46 RSVD BM48 QPI0_DRX_DN[19] QPI I BM50 QPI0_DRX_DP[16] QPI I BM52 QPI0_DRX_DP[14] QPI I BM54 QPI0_DRX_DP[12] QPI I [...]

  • Page 192

    Processor Land Listing 192 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two BT6 V C C PW R BT8 V C C PW R BU1 VCC PWR BU11 VCC PWR BU13 VCC PWR BU15 VCC PWR BU17 VCC PWR BU3 VCC PWR BU43 RSVD BU45 VSS GND BU47 VTT D PWR BU49 SKTOCC_N O BU5 VCC PWR BU51 VSS GND BU53 QPI0_DTX_DP[02] QPI O BU55 QPI0_DTX_DP[04[...]

  • Page 193

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 193 Datasheet Volume One of Two Processor Land Listing C15 VCCD_23 PWR C17 VCCD_23 PWR C19 VCCD_23 PWR C21 VCCD_23 PWR C23 VCCD_23 PWR C25 DDR3_ECC[3] SSTL I/O C3 VSS GND C33 VSS GND C35 DDR3_DQ[21] SSTL I/O C37 DDR3_DQ[02] SSTL I/O C39 VSS GND C41 VSS GND C43 DMI_TX_DP[1] PCIEX O C45 [...]

  • Page 194

    Processor Land Listing 194 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CC21 DDR0_PAR_ERR_N SSTL I CC23 DDR0_CS_N[2] SSTL O CC25 DDR0_CS_N[7] SSTL O CC27 DDR0_ODT[5] SSTL O CC29 VSS GND CC3 VSS GND CC31 DDR0_DQ[33] SSTL I/O CC33 DDR0_DQS_DP[04] SSTL I/O CC35 DDR0_DQ[35] SSTL I/O CC37 DDR0_DQ[52] SSTL I[...]

  • Page 195

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 195 Datasheet Volume One of Two Processor Land Listing CF26 DDR0_CS_N[5] SSTL O CF28 DDR0_ODT[3] SSTL O CF30 VSS GND CF32 VSS GND CF34 VSS GND CF36 VSS GND CF38 VSS GND CF4 DDR0_DQS_DP[01] SST L I/O CF40 VSS GND CF42 VSS GND CF44 RSV D CF46 QPI0_DTX_DN[10] QPI O CF48 QPI0_DTX_DN[15] QP[...]

  • Page 196

    Processor Land Listing 196 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CJ31 DDR0_DQ[41] SSTL I/O CJ33 DDR0_DQS_DP[05] SSTL I/O CJ35 DDR0_DQ[43] SSTL I/O CJ37 DDR0_DQ[60] SSTL I/O CJ39 DDR0_DQS_DP[16] SSTL I/O CJ41 DDR0_DQ[62] SSTL I/O CJ43 VSS GND CJ45 VSS GND CJ47 VSS GND CJ49 VTT A PWR CJ5 DDR0_DQ[1[...]

  • Page 197

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 197 Datasheet Volume One of Two Processor Land Listing CM38 VSS GND CM4 DDR1_DQ[04] SSTL I/O CM40 VSS GND CM42 VSS GND CM44 BCLK0_DN C MOS I CM46 QPI1_DRX_DN[18] QPI I CM48 QPI1_DRX_DN[16] QPI I CM50 QPI1_DRX_DP[14] QPI I CM52 QPI1_DRX_DN[10] QPI I CM54 QPI1_DRX_DN[05] QPI I CM56 QPI1_[...]

  • Page 198

    Processor Land Listing 198 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two CR35 VSS GND CR37 DDR1_DQ[48] SSTL I/O CR39 DDR1_DQS_DN[06] SSTL I/O CR41 DDR1_DQ[50] SSTL I/O CR43 SVIDALER T_N CMOS I CR45 VTT A PWR CR47 VSS GND CR49 VSS GND CR5 VSS GND CR51 VTT A PWR CR53 QPI1_DRX_DN[11] QPI I CR55 QPI1_CLKRX_[...]

  • Page 199

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 199 Datasheet Volume One of Two Processor Land Listing CV30 VSS GND CV32 VSS GND CV34 VSS GND CV36 DDR1_DQ[53] SSTL I/O CV38 VSS GND CV4 DDR1_DQ[02] SSTL I/O CV40 DDR1_DQ[55] SSTL I/O CV42 VSS GND CV44 QPI1_DTX_DN[14] QPI O CV46 QPI1_DTX_DN[08] QPI O CV48 QPI1_DTX_DN[00] QPI O CV50 QPI[...]

  • Page 200

    Processor Land Listing 200 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two D24 DDR3_MA[14] SSTL O D26 VSS GND D32 DDR3_DQ[18] SSTL I/O D34 DDR3_DQS_DP[11] SSTL I/O D36 VSS GND D38 DDR3_DQS_DP[00] SSTL I/O D4 TEST3 O D40 DDR3_DQ[05] SSTL I/O D42 DMI_TX_DN[0] PCIEX O D44 DMI_TX_DN[2] PCIEX O D46 RSVD D48 DM[...]

  • Page 201

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 201 Datasheet Volume One of Two Processor Land Listing DC33 DDR1_DQS_DP[14] S STL I/O DC35 DDR1_DQ[42] SSTL I/O DC37 DDR1_DQ[61] SSTL I/O DC39 DDR1_DQS_DP[07] S STL I/O DC41 VSS GND DC43 QPI1_DTX_DN[18] QPI O DC45 QPI1_DTX_DN[15] QPI O DC47 QPI1_DTX_DN[12] QPI O DC49 QPI1_DTX_DP[09] QP[...]

  • Page 202

    Processor Land Listing 202 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two E17 DDR3_ODT[2] SSTL O E19 DDR3_BA[1] SSTL O E21 DDR3_MA[01] SSTL O E23 DDR3_MA[12] SSTL O E25 DDR3_ECC[2] SSTL I/O E27 DDR3_DQS_DP[08] SSTL I/O E29 VSS GND E3 VSS GND E31 VSS GND E33 DDR3_DQS_DP[02] SSTL I/O E35 DDR3_DQ[20] SSTL I[...]

  • Page 203

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 203 Datasheet Volume One of Two Processor Land Listing H12 VSS GND H14 VSS GND H16 VCCD_23 PWR H18 VCCD_23 PWR H2 DDR3_DQ[57] SSTL I/O H20 VCCD_23 PWR H22 VCCD_23 PWR H24 VCCD_23 PWR H26 DDR3_ECC[7] SSTL I/O H28 DDR3_DQS_DN[17] SSTL I/O H30 DDR3_ECC[5] SSTL I/O H32 VSS GND H34 VSS GND [...]

  • Page 204

    Processor Land Listing 204 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two K6 DDR3_DQS_DP[06] SSTL I/O K8 VSS GND L1 DDR3_DQ[62] SSTL I/O L11 DDR3_DQS_DN[05] SSTL I/O L13 DDR3_DQ[41] SSTL I/O L15 DRAM_PWR_OK_C23 CMOS1.5v I L17 DDR2_BA[1] SSTL O L19 DDR3_ODT[0] SSTL O L21 DDR3_CLK_DP[1] SSTL O L23 DDR3_CLK[...]

  • Page 205

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 205 Datasheet Volume One of Two Processor Land Listing N7 DDR3_DQ[50] SSTL I/O N9 VSS GND P10 VSS GND P12 VSS GND P14 VSS GND P16 DDR2_WE_N SSTL O P18 DDR2_CS_N[5] SSTL O P20 DDR2_MA[04] SSTL O P22 DDR2_MA[07] SSTL O P24 DDR2_BA[2] SSTL O P26 VSS GND P28 DDR3_DQS_DN[03] SSTL I/O P30 VS[...]

  • Page 206

    Processor Land Listing 206 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two U13 DDR2_DQ[49] SSTL I/O U15 DDR23_RCOMP[0] Analog I U17 DDR2_RAS_N SSTL O U19 DDR2_MA[02] SSTL O U21 DDR2_MA[05] SSTL O U23 DDR2_MA[11] SSTL O U25 DDR2_MA[15] SSTL O U27 DDR2_CKE[2] SSTL O U29 DDR2_DQ[19] SSTL I/O U3 DDR2_DQ[60] S[...]

  • Page 207

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 207 Datasheet Volume One of Two Processor Land Listing § Y18 DDR2_OD T[3] SSTL O Y20 DDR2_OD T[0] SSTL O Y22 DDR2_ CLK_DN [1] SSTL O Y24 DDR2_ CLK_DN [0] SSTL O Y26 DDR2_ECC[2] SSTL I/O Y28 VSS GN D Y30 VSS GN D Y32 VSS GN D Y34 DDR2_DQS_DP[12] SSTL I/O Y36 VSS GN D Y38 VSS GN D Y4 DD[...]

  • Page 208

    Processor Land Listing 208 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two[...]

  • Page 209

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 209 Datasheet Volume One of Two Package Mechanical Specifications 9 Package Mechanical Specifications The processor is packaged in a Flip-Chip Land Grid Arr ay (FCLGA12) package that interfaces with the baseboard via an LGA2 011-0 sock et. The package consists of a processor mounted o[...]

  • Page 210

    Package Mechanical Specifications 210 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 9.2 Package Mechanical Drawing (PMD) The package mechanical dr awings are sh own as package A size 52.5 mm x 45 mm, Figure 9-2 and Figure 9-3 , and package B siz e 52.5 mm x 51 mm Figure 9-4 and Figure 9-5 . The dr awing[...]

  • Page 211

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 211 Datasheet Volume One of Two Package Mechanical Specifications Figure 9-2. Processor PMD Package A (52.5 x 45 mm) Sheet 1 of 2[...]

  • Page 212

    Package Mechanical Specifications 212 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 9-3. Processor PMD Package A (5 2.5 x 45 mm) Sheet 2 of 2[...]

  • Page 213

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 213 Datasheet Volume One of Two Package Mechanical Specifications Figure 9-4. Processor PMD Package B (5 2.5 x 51 mm) Sheet 1 of 2[...]

  • Page 214

    Package Mechanical Specifications 214 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 9-5. Processor PMD Package B (52.5 x 51 mm) Sheet 2 of 2[...]

  • Page 215

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families, 215 Datasheet Volume One of Two Package Mechanical Specifications 9.3 Processor Component Keep-Out Zones The processor may contain components on the substrate that define component keep-out zone requirements. A th ermal and mechanical solution design must not intrude into the required[...]

  • Page 216

    Package Mechanical Specifications 216 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 9.7 Processor Mass Specificat ion The typical mass of the processor is currently 45 gr ams. This mass [weight] includes all the components that are included in the package. 9.8 Processor Materials Ta b l e 9 - 4 lists so[...]

  • Page 217

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 217 Datasheet Volume One of Two Boxed Processor Specifications 10 Boxed Processor Specifications 10.1 Introduction Intel box e d processors are intended for sy stem integr ators who build systems from components av ailable through distribution channels. The Intel® Xeon® processor E5-[...]

  • Page 218

    Boxed Processor Specifications 218 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two The STS200C utilizes a fan capable of 4-pin pulse width modulated (PWM) control. Use of a 4-pin PWM controlled active thermal solution helps custom ers meet acoustic targets in pedestal platforms through the baseboard’ s [...]

  • Page 219

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 219 Datasheet Volume One of Two Boxed Processor Specifications sink solutions. The retention solution used for the S TS200P Heat Sink Solution is called the ILM R e tention System (ILM-RS).The rete ntion solution used for the STS200PNRW Narrow Heat Sink Solution is called the Narrow IL[...]

  • Page 220

    Boxed Processor Specifications 220 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-4. Boxed Processor Moth erboard Keepout Zone s (1 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2X 46.0 SOCKET ILM HOLE PATTERN 2X 69.2 SOCKET ILM HOLE PATTERN 2200 MISSION COLLEGE BLVD. R P.O. BOX 58119 SAN[...]

  • Page 221

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 221 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-5. Boxed Processor Motherboard Keepout Zones (2 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2200 MISSION COLLEGE BLVD. R P.O. BOX 58119 SANTA CLARA, CA 95052-8119 12.80 18.20 2X 7.05 2X 34.05 2X 3.30 2X 4.[...]

  • Page 222

    Boxed Processor Specifications 222 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-6. Boxed Processor Moth erboard Keepout Zone s (3 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2X 23.40 2200 MISSION COLLEGE BLVD. R P.O. BOX 58119 SANTA CLARA, CA 95052-8119 2X 5.0 2X 26.50 14.0 R TYP 1.00[...]

  • Page 223

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 223 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-7. Boxed Processor Motherboard Keepout Zones (4 of 4) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 76.50 81.50 2200 MISSION COLLEGE BLVD. R P.O. BOX 58119 SANTA CLARA, CA 95052-8119 MIN 97.0° MIN 97.0° 93.0 93.[...]

  • Page 224

    Boxed Processor Specifications 224 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-8. Boxed Processor Heat Sink Volumetric (1 of 2) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A 2200 MISSION COLLEGE BLVD. P.O. BOX 58119 SANTA CLARA, CA 95052-8119 R 4X 12.00 +1.00 0 0.472 +0.039 -0.000 [] 4X 12.0[...]

  • Page 225

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 225 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-9. Boxed Processor He at Sink Volumetric (2 of 2) 1 3 4 5 6 7 8 B C D A 1 2 3 4 5 6 7 8 B C D A A A 2200 MISSION COLLEGE BLVD. P.O. BOX 58119 SANTA CLARA, CA 95052-8119 R 38.00# 0.50 1.496# 0.019 [] 38.00[...]

  • Page 226

    Boxed Processor Specifications 226 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two Figure 10-10.4-Pin Fan Cable Connector (For Active Heat Sink)[...]

  • Page 227

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 227 Datasheet Volume One of Two Boxed Processor Specifications Figure 10-11.4-P in Base Baseboard Fa n Header (For Active Heat Sink)[...]

  • Page 228

    Boxed Processor Specifications 228 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.2.2 Boxed Processor Retention Mechanism and H eat Sink Support (ILM-RS) Baseboards designed for use by a system in tegrator should include holes that are in proper alignment with each other to support the bo xed processo[...]

  • Page 229

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 229 Datasheet Volume One of Two Boxed Processor Specifications 10.3.1 Boxed Processor Cooling Requirements As previously stated the box ed processor will have three thermal solutions available. Each configuration will require unique design considerations. Meeting the processor’s temp[...]

  • Page 230

    Boxed Processor Specifications 230 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.3.1.2 STS200P and STS200PNR W (25.5m m Tall Pa ssive Heat Sink Solution) (Blade + 1U + 2U Rack) These passive solutions are intended for use in S SI Blade, 1U or 2U rack configurations. It is assumed that a chassis duct [...]

  • Page 231

    Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families 231 Datasheet Volume One of Two Boxed Processor Specifications Notes: 1. Local ambient temperature of the air entering the heatsink or fan. System ambien t and altitude are assumed 35C and sea level. 2. Max target (mean + 3 sigma) for thermal characterization par a me ter . 3. Airflow [...]

  • Page 232

    Boxed Processor Specifications 232 Intel® Xeon® Processor E5-1600 v2/E5-2600 v2 Product Families Datasheet Volume One of Two 10.4 Boxed Processor Contents The Box ed Processor and Boxed Th ermal Solution contents are outlined below . Boxed Processor • Intel® Xeon® processor E5-2600 v2 product family • Installation and warranty m anual • I[...]